Circuit board and manufacturing method thereof

US2017110393A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2017110393-A1
Application numberUS-201615391861-A
CountryUS
Kind codeA1
Filing dateDec 28, 2016
Priority dateOct 31, 2011
Publication dateApr 20, 2017
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A circuit board includes a composite layer of a non-conductor inorganic material and an organic material, a plurality of conductive structures, a first built-up structure, and a second built-up structure. The composite layer of the non-conductor inorganic material and the organic material has a first surface and a second surface opposite to each other and a plurality of openings. The conductive structures are respectively disposed in the openings of the composite layer of the non-conductor inorganic material and the organic material. The first built-up structure is disposed on the first surface of the composite layer of the non-conductor inorganic material and the organic material and electrically connected to the conductive structures. The second built-up structure is disposed on the second surface of the composite layer of the non-conductor inorganic material and the organic material and electrically connected to the conductive structures.

First claim

Opening claim text (preview).

What is claimed is: 1 . A circuit board, comprising: a composite layer of a non-conductor inorganic material and an organic material, having a first surface and a second surface opposite to each other and a plurality of openings; a plurality of conductive structures, respectively disposed in the openings of the composite layer of the non-conductor inorganic material and the organic material; a first built-up structure, disposed on the first surface of the composite layer of the non-conductor inorganic material and the organic material and electrically connected to the conductive structures; and a second built-up structure, disposed on the second surface of the composite layer of the non-conductor inorganic material and the organic material and electrically connected to the conductive structures. 2 . The circuit board as recited in claim 1 , wherein a material of the composite layer of the non-conductor inorganic material and the organic material comprises a composite material composed of a ceramic material and a polymer material. 3 . The circuit board as recited in claim 2 , wherein the ceramic material comprises zirconia, aluminum oxide, silicon nitride, silicon carbide, silicon oxide, or a combination thereof, and the polymer material comprises epoxy resins, polyimide, liquid crystal polymers, methacrylate resins, vinyl phenyl resins, allyl resins, polyacrylate resins, polyether resins, polyolefin resins, polyamide resins, polysiloxane resins, or a combination thereof. 4 . The circuit board as recited in claim 1 , wherein the composite layer of the non-conductor inorganic material and the organic material is an imitation nacreous layer. 5 . The circuit board as recited in claim 1 , wherein a Young's modulus of the composite layer of the non-conductor inorganic material and the organic material is between 20 GPa and 100 GPa. 6 . The circuit board as recited in claim 1 , further comprising: a plurality of pads, disposed on the second surface of the composite layer of the non-conductor inorganic material and the organic material and electrically connected to the conductive structures, wherein the openings are a plurality of blind holes, a portion of the first built-up structure is embedded in the first surface of the composite layer of the non-conductor inorganic material and the organic material, and the pads are electrically connected to the first built-up structure through the conductive structures. 7 . The circuit board as recited in claim 1 , wherein the openings are a plurality of through vias connected to the first surface and the second surface of the composite layer of the non-conductor inorganic material and the organic material, the conductive structures are a plurality of conductive pillars, and the first built-up structure is electrically connected to the second built-up structure through the conductive structures. 8 . The circuit board as recited in claim 1 , wherein the first built-up structure comprises at least a first dielectric layer, at least a first patterned conductive layer, and at least a first conductive hole structure penetrating the first dielectric layer, the first dielectric layer and the first patterned conductive layer are sequentially stacked on the first surface of the composite layer of the non-conductor inorganic material and the organic material, and the first patterned conductive layer is electrically connected to the conductive structures through the first conductive hole structure. 9 . The circuit board as recited in claim 1 , wherein the second built-up structure comprises at least a second dielectric layer, at least a second patterned conductive layer, and at least a second conductive hole structure penetrating the second dielectric layer, the second dielectric layer and the second patterned conductive layer are sequentially stacked on the second surface of the composite layer of the non-conductor inorganic material and the organic material, and the second patterned conductive layer is electrically connected to the conductive structures through the second conductive hole structure. 10 . The circuit board as recited in claim 1 , further comprising: a solder mask layer, disposed on the second built-up structure, wherein the solder mask layer exposes a portion of the second built-up structure; and a surface treatment layer, disposed on the second built-up structure exposed by the solder mask layer. 11 . A manufacturing method of a circuit board, comprising: providing a support plate, the support plate being provided with a temporary adhesive layer and a patterned circuit layer located on the temporary adhesive layer thereon; forming a first built-up structure on the temporary adhesive layer and electrically connected to the patterned circuit layer; disposing a composite layer of a non-conductor inorganic material and an organic material and a plurality of conductive structures on the first built-up structure, wherein the composite layer of the non-conductor inorganic material and the organic material covers the conductive structures, and the conductive structures are electrically connected to the first built-up structure; forming a second built-up structure on the composite layer of the non-conductor inorganic material and the organic material, wherein the second built-up structure is electrically connected to the first built-up structure through the conductive structures; and removing the support plate and the temporary adhesive layer, so as to expose a surface of the first built-up structure and the patterned circuit layer. 12 . The manufacturing method of the circuit board as recited in claim 11 , wherein a material of the composite layer of the non-conductor inorganic material and the organic material comprises a composite material composed of a ceramic material and a polymer material. 13 . The manufacturing method of the circuit board as recited in claim 12 , wherein the ceramic material comprises zirconia, aluminum oxide, silicon nitride, silicon carbide, silicon oxide, or a combination thereof, and the polymer material comprises epoxy resins, polyimide, liquid crystal polymers, methacrylate resins, vinyl phenyl resins, allyl resins, polyacrylate resins, polyether resins, polyolefin resins, polyamide resins, polysiloxane resins, or a combination thereof. 14 . The manufacturing method of the circuit board as recited in claim 11 , wherein the composite layer of the non-conductor inorganic material and the organic material is an imitation nacreous layer. 15 . The manufacturing method of the circuit board as recited in claim 11 , wherein a Young's modulus of the composite layer of the non-conductor inorganic material and the organic material is between 20 GPa and 100 GPa. 16 . The manufacturing method of the circuit board as recited in claim 11 , wherein the step of disposing the composite layer of the non-conductor inorganic material and the organic material and the conductive structures on the first built-up structure comprises: disposing the composite layer of the non-conductor inorganic material and the organic material on the first built-up structure, the composite layer of the non-conductor inorganic material and the organic material having a plurality of blind holes, the blind holes exposing a portion of the first built-up structure; and forming the conductive structures on the first built-up structure and located in the blind holes, wherein the conductive structures are electrically connected to the first built-up structure exposed by the blind holes. 17 . The manufacturing method of the circuit

Assignees

Inventors

Classifications

  • used as a support during the manufacture of self-supporting substrates · CPC title

  • used as a support during manufacture of interconnect decals or build up layers · CPC title

  • using temporarily an auxiliary support · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

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What does patent US2017110393A1 cover?
A circuit board includes a composite layer of a non-conductor inorganic material and an organic material, a plurality of conductive structures, a first built-up structure, and a second built-up structure. The composite layer of the non-conductor inorganic material and the organic material has a first surface and a second surface opposite to each other and a plurality of openings. The conductive…
Who is the assignee on this patent?
Unimicron Technology Corp
What technology area does this patent fall under?
Primary CPC classification H10W70/635. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Apr 20 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).