Semiconductor device having improved core and input/output device reliability

US2017040310A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2017040310-A1
Application numberUS-201615299282-A
CountryUS
Kind codeA1
Filing dateOct 20, 2016
Priority dateJul 30, 2013
Publication dateFeb 9, 2017
Grant date

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

Official abstract text for this publication.

A semiconductor device includes a semiconductor substrate having a core device and an IO device. The core device includes a gate interface layer and a high-k dielectric layer on the gate interface layer. The IO device includes a gate interface layer and a high-k dielectric layer on the gate interface layer. The gate interface layer of the core device and the gate interface layer of the IO device each are doped with fluoride ions

First claim

Opening claim text (preview).

What is claimed is: 1 . A semiconductor device comprising: a semiconductor substrate having a core device and an IO device, the core device comprising a gate interface layer and a high-k dielectric layer on the gate interface layer, the IO device comprising a gate interface layer and a high-k dielectric layer on the gate interface layer, wherein the gate interface layer of the core device and the gate interface layer of the IO device each are doped with fluoride ions, and wherein the high-k dielectric layer of the core device and the high-k dielectric layer of the IO device each are doped with fluoride ions. 2 . The semiconductor device of claim 1 , wherein the high-k dielectric layer of the core device and the high-k dielectric layer of the IO device each have a U-shaped cross-section. 3 . The semiconductor device of claim 1 , further comprising: a work function on the high-k dielectric layer of the core device and a metal gate on the work function; and a work function on the high-k dielectric layer of the IO device and a metal gate on the work function.

Assignees

Inventors

Classifications

  • with substrate doping, e.g. N, Ge or C implantation, before formation of the insulator · CPC title

  • with a treatment, e.g. annealing, after the formation of the conductor · CPC title

  • Electricity · mapped topic

  • Electricity · mapped topic

  • Electricity · mapped topic

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What does patent US2017040310A1 cover?
A semiconductor device includes a semiconductor substrate having a core device and an IO device. The core device includes a gate interface layer and a high-k dielectric layer on the gate interface layer. The IO device includes a gate interface layer and a high-k dielectric layer on the gate interface layer. The gate interface layer of the core device and the gate interface layer of the IO devic…
Who is the assignee on this patent?
Semiconductor Mfg Int Shanghai Corp
What technology area does this patent fall under?
Primary CPC classification H01L27/0207. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Feb 09 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).