Semiconductor device

US2016380068A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016380068-A1
Application numberUS-201514956977-A
CountryUS
Kind codeA1
Filing dateDec 2, 2015
Priority dateJun 23, 2015
Publication dateDec 29, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An emitter electrode includes a first electrode layer, a second electrode layer, and a third electrode layer. The first to third electrode layers are laid in this order on an emitter layer. A solder layer is further laid on the third electrode layer. The first electrode layer covers the emitter layer and a gate oxide film in a front surface of a semiconductor chip. A first electroconductive material forming the first electrode layer has AlSi as its main component. A second electroconductive material forming the second electrode layer has a linear expansion coefficient different from that of the first electroconductive material and is lower in mechanical strength than the first electroconductive material. A third electroconductive material constituting the third electrode layer has a linear expansion coefficient different from that of the first electroconductive material and has solder wettability higher than that of the first electrode layer.

First claim

Opening claim text (preview).

What is claimed is: 1 . A semiconductor device comprising: a semiconductor layer; a first electrode layer provided on a front surface of the semiconductor layer and formed of a first electroconductive material; a second electrode layer laid on the first electrode layer and formed of a second electroconductive material having a linear expansion coefficient different from that of the first electroconductive material and lower in mechanical strength than the first electroconductive material; and a third electrode layer laid on the second electrode layer and formed of a third electroconductive material having a linear expansion coefficient different from that of the first electroconductive material and having solder wettability higher than that of the first electroconductive material. 2 . The semiconductor device according to claim 1 , further comprising a barrier metal layer provided between the first electrode layer and the second electrode layer and formed of an electroconductive material higher in mechanical strength than the second electroconductive material. 3 . The semiconductor device according to claim 2 , wherein the electroconductive material of the barrier metal layer is Ti or a Ti alloy. 4 . The semiconductor device according to claim 1 , wherein the first electroconductive material is AlSi and the second electroconductive material is pure aluminum. 5 . The semiconductor device according to claim 4 , wherein the first electroconductive material is AlSi in which the proportion of Si is higher than 1%. 6 . The semiconductor device according to claim 1 , wherein the first electroconductive material is AlSiCu in which the proportion of Si is higher than 1%, and which contains Cu. 7 . The semiconductor device according to claim 1 , further comprising a guard ring provided in the front surface of the semiconductor layer, the guard ring surrounding the first electrode layer as seen in a plan view, wherein the second electrode layer is provided by being extended outward relative to the third electrode layer so that a peripheral edge of the second electrode layer surrounds a peripheral edge of the third electrode layer as seen in the plan view. 8 . The semiconductor device according to claim 1 , further comprising: a solder layer laid on the third electrode layer; and a lead frame soldered to the third electrode layer by means of the solder layer. 9 . The semiconductor device according to claim 1 , wherein the material of the semiconductor layer is a wide-bandgap semiconductor. 10 . A semiconductor device comprising: a semiconductor layer; a first electrode layer laid on a front surface of the semiconductor layer and formed of AlCu or AlSiCu; and a second electrode layer laid on the first electrode layer and formed of Cu. 11 . The semiconductor device according to claim 10 , wherein the material of the first electrode layer is AlCu in which the proportion of Cu is higher than 1%. 12 . The semiconductor device according to claim 10 , wherein the material of the first electrode layer is AlSiCu in which the proportion of Si is higher than 1%. 13 . The semiconductor device according to claim 10 , further comprising a barrier metal layer provided between the first electrode layer and the second electrode layer and formed of a material higher in mechanical strength than the second electroconductive material. 14 . The semiconductor device according to claim 13 , wherein the material of the barrier metal layer is Ti or a Ti alloy. 15 . The semiconductor device according to claim 10 , further comprising a guard ring provided in the front surface of the semiconductor layer, the guard ring surrounding the first electrode layer as seen in a plan view, wherein the first electrode layer is provided by being extended outward relative to a peripheral edge of the second electrode layer as seen in the plan view. 16 . The semiconductor device according to claim 10 , further comprising: a solder layer laid on the second electrode layer; and a lead frame soldered to the second electrode layer by means of the solder layer. 17 . The semiconductor device according to claim 10 , wherein the material of the semiconductor layer is a wide-bandgap semiconductor.

Assignees

Inventors

Classifications

  • between laterally-adjacent chips · CPC title

  • Encapsulations, e.g. protective coatings · CPC title

  • characterised by changes in properties of the die-attach connectors during connecting · CPC title

  • multiple bond wires connected to common bond pads at both ends of the wires · CPC title

  • Die-attach connectors and bond wires · CPC title

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Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US2016380068A1 cover?
An emitter electrode includes a first electrode layer, a second electrode layer, and a third electrode layer. The first to third electrode layers are laid in this order on an emitter layer. A solder layer is further laid on the third electrode layer. The first electrode layer covers the emitter layer and a gate oxide film in a front surface of a semiconductor chip. A first electroconductive mat…
Who is the assignee on this patent?
Mitsubishi Electric Corp
What technology area does this patent fall under?
Primary CPC classification H10D64/233. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Dec 29 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).