Manufacturing method for reverse conducting insulated gate bipolar transistor

Patent metadata

Field	Value
Publication number	US-2016379974-A1
Application number	US-201414902519-A
Country	US
Kind code	A1
Filing date	Aug 19, 2014
Priority date	Aug 23, 2013
Publication date	Dec 29, 2016
Grant date	—

Abstract

A manufacturing method for reverse conducting insulated gate bipolar transistor, the manufacturing method is characterized by the use of polysilicon for filling in grooves on the back of a reverse conducting insulated gate bipolar transistor. The parameters of reverse conducting diodes on the back of the reverse conducting insulated gate bipolar transistor can be controlled simply by controlling the doping concentration of the polysilicon accurately, indicating relatively low requirements for process control. The reverse conducting insulated gate bipolar transistor manufacturing method is relatively low in requirements for process control and relatively small in manufacturing difficulty.

First claim

1 . A method of manufacturing a reverse conducting insulated gate bipolar transistor, comprising the following steps:
preparing an N-type substrate; growing a gate oxide layer at a front side of the N-type substrate; depositing a polysilicon gate on the gate oxide layer; forming a P well on the N-type substrate by photoetching, etching and ion-implanting processes; forming an N+ region and a front side P+ region in the P well by photoetching and ion-implanting processes; depositing a dielectric layer at the front side of the N-type substrate; depositing a protecting layer on the dielectric layer; grinding the N-type substrate by a back side grinding process; forming a back side P+ region by implanting a P-type impurity to a back side of the N-type substrate; forming a trench at the back side of the N-type substrate by photoetching and etching processes; filling the trench by depositing polysilicon at the back side of the N-type substrate, and etching the polysilicon positioned at an area outside of the trench; removing the protecting layer at the front side of the N-type substrate; selectively etching the dielectric layer to form a contact hole for shorting the N+ region and the front side P+ region, and forming a front side metal layer; depositing a passivation layer at the front side of the N-type substrate; and performing a back side metallization process at the back side of the N-type substrate, and forming a back side metal layer.

2 . The method of manufacturing the reverse conducting insulated gate bipolar transistor of claim 1 , characterized in that, after forming the back side metal layer by performing the back side metalized process at the back side of the N-type substrate, the method further comprises controlling a carrier lifetime at a partial area in the N-type substrate by a local radiation technique.

3 . The method of manufacturing the reverse conducting insulated gate bipolar transistor of claim 2 , characterized in that, the local radiation technique radiates the N-type substrate by using electron or proton.

4 . The method of manufacturing the reverse conducting insulated gate bipolar transistor of claim 1 , characterized in that, the trench formed at the back side of the N-type substrate is of a rectangle shape.

5 . The method of manufacturing the reverse conducting insulated gate bipolar transistor of claim 4 , characterized in that, a depth of the trench formed at the back side of the N-type substrate is from 1 to 20 nm, a width thereof is from 1 to 30 nm, and a distance between two adjacent trenches is from 50 to 300 μm.

6 . The method of manufacturing the reverse conducting insulated gate bipolar transistor of claim 1 , characterized in that, the polysilicon deposited in the trench formed at the back side of the N-type substrate is N-type polysilicon.

7 . The method of manufacturing the reverse conducting insulated gate bipolar transistor of claim 6 , characterized in that, a doping concentration of the polysilicon deposited in the trench formed at the back side of the N-type substrate is 1E17 to 1E21 cm −3 .

8 . The method of manufacturing the reverse conducting insulated gate bipolar transistor of claim 1 , characterized in that, from the N-type substrate to an external, the back side metal layer comprises aluminum, titanium, nickel and silver, which are laminated in that order.

9 . The method of manufacturing the reverse conducting insulated gate bipolar transistor of claim 1 , characterized in that, the dielectric layer is made of silicon dioxide and boro-phospho-silicate glass.

10 . The method of manufacturing the reverse conducting insulated gate bipolar transistor of claim 1 , characterized in that, the protecting layer is made of silicon nitride.

Assignees

• Csmc Technologies Fab1 Co Ltd

Inventors

• Zhang Shuo
• Rui Qiang
• Wang Genyi
• Deng Xiaoshe

Classifications

• H10P34/40

  with high-energy radiation · CPC title

• H10P52/00

  Grinding, lapping or polishing of wafers, substrates or parts of devices · CPC title

• H10P50/242

  of Group IV materials · CPC title

• H10P30/204

  into Group IV semiconductors · CPC title

• H10P30/21

  of electrically active species · CPC title