Sidewall protection scheme for contact formation

US2016379870A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016379870-A1
Application numberUS-201615191912-A
CountryUS
Kind codeA1
Filing dateJun 24, 2016
Priority dateJun 24, 2015
Publication dateDec 29, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Method of manufacturing a semiconductor device is described that uses sidewall protection of a recessed feature to prevent loss of critical dimension during a cleaning process to remove etch residue. According to one embodiment, the method includes providing a substrate containing a film thereon having a recessed feature with a sidewall and a bottom portion, depositing a conformal film on the sidewall and on the bottom portion, removing the conformal film from the bottom portion in an anisotropic etching process, where the remaining conformal film forms a protection film on the sidewall, and performing a cleaning process that removes etch residue from the recessed feature without etching the protection film or the sidewall.

First claim

Opening claim text (preview).

What is claimed is: 1 . A substrate processing method, comprising: providing a substrate containing a film thereon having a recessed feature with a sidewall and a bottom portion; depositing a conformal film on the sidewall and on the bottom portion; removing the conformal film from the bottom portion in an anisotropic etching process, wherein the remaining conformal film forms a protection film on the sidewall; and performing a cleaning process that removes etch residue from the bottom portion without etching the protection film or the sidewall. 2 . The method of claim 1 , further comprising following the cleaning process, performing an isotropic etching process to form a contact region below the protection film, the contact region having a width that is greater than a width of the recessed feature. 3 . The method of claim 1 , wherein the cleaning process further etches the bottom portion to form a cavity below the protection film. 4 . The method of claim 1 , wherein an etch stop layer forms the bottom portion of the recessed feature. 5 . The method of claim 4 , further comprising etching through the etch stop layer prior to performing the cleaning process to remove the residue. 6 . The method of claim 4 , further comprising etching through the etch stop layer after performing the cleaning process to remove the residue. 7 . The method of claim 1 , wherein the conformal film includes a metal oxide film that is selected from the group consisting of HfO 2 , ZrO 2 , TiO 2 , Al 2 O 3 , and a combination thereof. 8 . The method of claim 1 , wherein the conformal film is selected from the group consisting of a metal oxide film, a metal nitride film, a metal oxynitride film, a metal silicate film, and a combination thereof 9 . The method of claim 1 , wherein the conformal film has a thickness of about 4 nm or less. 10 . The method of claim 1 , wherein the cleaning process includes a wet cleaning process that uses aqueous HCl, aqueous H 2 O 2 , aqueous HF, aqueous NH 4 OH, aqueous H 3 PO 4 , aqueous H 2 SO 4 , or a combination thereof. 11 . The method of claim 1 , wherein the cleaning process includes a dry etching process that includes exposing the substrate to a gas containing HF, NH 3 , H 2 O 2 , a halogen-containing gas, or a combination thereof. 12 . The method of claim 1 , wherein the cleaning process includes a chemical oxide removal (COR) process that removes silicon and oxygen. 13 . The method of claim 1 , wherein depositing the conformal film includes atomic layer deposition (ALD). 14 . A substrate processing method, comprising: providing a substrate containing a film thereon having a recessed feature with a sidewall and an etch stop layer forming a bottom portion of the recessed feature; depositing a conformal metal oxide film by atomic layer deposition (ALD) on the sidewall and on the bottom portion; removing the conformal metal oxide film from the bottom portion in an anisotropic etching process, wherein the remaining conformal metal oxide film forms a protection film on the sidewall; and performing a cleaning process that removes etch residue from the recessed feature without etching the protection film or the sidewall. 15 . The method of claim 14 , further comprising etching through the etch stop layer prior to performing the cleaning process to remove the residue. 16 . The method of claim 14 , further comprising etching through the etch stop layer after performing the cleaning process to remove the residue. 17 . The method of claim 14 , wherein the metal oxide film is selected from the group consisting of HfO 2 , ZrO 2 , TiO 2 , Al 2 O 3 , and a combination thereof 18 . The method of claim 14 , wherein the cleaning process includes a wet cleaning process that uses aqueous HCl, aqueous H 2 O 2 , aqueous HF, aqueous NH 4 OH, aqueous H 3 PO 4 , aqueous H 2 SO 4 , or a combination thereof. 19 . The method of claim 14 , wherein the cleaning process includes a dry etching process that includes exposing the substrate to a gas containing HF, NH 3 , H 2 O 2 , a halogen-containing gas, or a combination thereof 20 . The method of claim 14 , wherein the protection film has a thickness of about 2 nm or less.

Assignees

Inventors

Classifications

  • deposition by cyclic CVD, e.g. ALD, ALE or pulsed CVD · CPC title

  • the processing being the formation of vias or contact holes · CPC title

  • characterised by the process involved to create the mask, e.g. lift-off masks or sidewalls or to modify the mask · CPC title

  • Chemical etching · CPC title

  • of materials not containing Si, e.g. PZT or Al2O3 · CPC title

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What does patent US2016379870A1 cover?
Method of manufacturing a semiconductor device is described that uses sidewall protection of a recessed feature to prevent loss of critical dimension during a cleaning process to remove etch residue. According to one embodiment, the method includes providing a substrate containing a film thereon having a recessed feature with a sidewall and a bottom portion, depositing a conformal film on the s…
Who is the assignee on this patent?
Tokyo Electron Ltd
What technology area does this patent fall under?
Primary CPC classification H10W20/081. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Dec 29 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).