FETS and Methods of Forming FETS

Patent metadata

Field	Value
Publication number	US-2016365362-A1
Application number	US-201615246843-A
Country	US
Kind code	A1
Filing date	Aug 25, 2016
Priority date	Apr 30, 2015
Publication date	Dec 15, 2016
Grant date	—

Abstract

A fin structure on a substrate can have a lower portion formed from the substrate, a middle portion, and an upper portion. The middle portion can include a dielectric region having a dielectric composition and a concentrated region of a first material. The first material can be an element of the dielectric composition. The concentrated region can be located at an interface of the middle portion and lower portion. The structure can also include isolation regions in the substrate on opposing sides of the fin. The structure can also include a gate structure over the upper portion of the fin that are exposed from the isolation regions. The gate structure can include a gate dielectric and gate material over the gate dielectric. The structure can also include source/drain regions extending laterally from the upper portion and the middle portion of the fin.

First claim

What is claimed is:

1 . A structure comprising:
a fin on a substrate, the fin comprising a lower portion, middle portion, and upper portion, the lower portion being formed from the substrate, and the middle portion comprising:
a dielectric region comprising a dielectric composition, and
a first concentrated region of a first material, the first material being an element of the dielectric composition, the first concentrated region being at an interface of the middle portion and lower portion;
isolation regions in the substrate and on opposing sides of the fin in cross-sectional view; a gate structure on exposed surfaces of the upper portion of the fin that are exposed from the isolation regions, the gate structure comprising a gate dielectric along the exposed surfaces and gate material over the gate dielectric and source/drain regions extending laterally from the upper portion and the middle portion of the fin.

2 . The structure of claim 1 , wherein the dielectric composition comprises SiGeOx and wherein the first material is Ge.

3 . The structure of claim 1 , wherein the middle portion further comprises:
a second concentrated region of the first material, the second concentrated region being at an interface of the middle portion and the upper portion.

4 . The structure of claim 2 , wherein the dielectric composition comprises SiGeOx and wherein the first material is Ge.

5 . The structure of claim 1 , wherein the middle portion further comprises:
a third concentrated region of the first material, the third concentrated region being in a center of the middle portion in cross-sectional view and surrounded by the dielectric composition.

6 . The structure of claim 5 , wherein the isolation regions comprise:
a second material, different from the dielectric material of the middle portion of the fin; and a fourth concentrated region of the first material, the fourth concentrated region being in a horizontal line in cross-sectional view on either side of the center of the middle portion and surrounded by the second material.

7 . The structure of claim 1 , wherein the middle portion, in cross-sectional view, protrudes further laterally than a narrowest part of the lower portion of the fin.

8 . The structure of claim 1 , wherein the lower portion of the fin comprises a shoulder located proximate to the middle portion of the fin.

9 . The structure of claim 1 , wherein, in a longitudinal cross-section of the fin, the lower portion of the fin extends laterally beyond the gate structure, and the source/drain regions are on the extended portions of the lower portion of the fin.

10 . The structure of claim 1 , wherein the lower portion of the fin comprises a doped anti-punch through region.

11 . A FinFET device, comprising:
a plurality of fins formed in a substrate the fins comprising a gate region and a source/drain region; a dielectric over the fins in the gate region, the dielectric comprising a silicon-based oxide that includes germanium; an upper fin portion over the dielectric; isolation material deposited in trenches between the fins, wherein in the gate region the isolation material is deposited between the dielectric and has an uppermost surface higher than an uppermost surface of the dielectric region but lower than an uppermost surface of the upper fin portion, and wherein in the source/drain region, the isolation material projects laterally from the isolation material in the gate region having a cross-sectional profile in the source/drain region similar to a cross-sectional profile in the gate region; a gate structure over the upper fin portion in the gate region, the gate structure in contact with exposed surfaces of the upper fin portion that are exposed from the isolation material, the gate structure defining a channel region in the upper portion, the gate structure comprising a gate dielectric and gate material over the gate dielectric; and source/drain structure in the source drain region, extending laterally from the gate region and formed over the plurality of fins, wherein a bottom surface of the source/drain structure is lower than uppermost surface of the isolation material.

12 . The device of claim 11 , wherein the dielectric further comprises:
a first concentrated region of germanium, the first concentrated region being at an interface of the dielectric and the lower fins.

13 . The device of claim 12 , wherein the dielectric comprises SiGeOx.

14 . The device of claim 12 , wherein the dielectric further comprises:
a second concentrated region of germanium, the second concentrated region being in a center of the dielectric in cross-sectional view and surrounded by the silicon-based oxide.

15 . The device of claim 14 , wherein the isolation material comprises:
a first material, different from the silicon-based oxide of the dielectric; and a third concentrated region of germanium, the third concentrated region being in a horizontal line in cross-sectional view on either side of the center of the dielectric and encompassed by the first material.

16 . A method, comprising:
forming a first layer of a first material over a substrate; forming a second layer of a second material over the first layer; recessing, through the first layer and the second layer, the substrate to form at least one fin and a trench on either side of the fin, the at least one fin comprising a lower portion made from the recessed substrate, a middle portion made from the first layer, and an upper portion made from the second layer; oxidizing the first material to transform at least a portion of the first material into a third material; oxidizing sidewalls of the upper portion to transform a portion of the second material into a fourth material; oxidizing a top portion of the sidewalls of the lower portion to transform the top portion into a fifth material; depositing an isolation material into the trenches; planarizing an uppermost surface of the isolation material to be coplanar with an uppermost surface of the upper portion; following the planarizing, recessing the isolation material such that the uppermost surface of the isolation material is above an interface of the middle portion and upper portion of the fin; forming a gate structure over the fin, a portion of the fin under the gate structure comprising a gate region and a portion of the fin not under the gate structure comprising a drain/source region; in the drain/source region, etching the fin to remove the upper portion and middle portion; and in the drain/source region, epitaxially forming a drain/source contact over the lower portion of the fin.

17 . The method of claim 16 , wherein the oxidizing the first material causes a first concentration of a residue material to be in a center of the middle portion in cross-section view, the residue material being surrounded by the third material.

18 . The method of claim 17 , wherein the oxidizing the first material causes a second concentration of the residue material to be at an interface of the lower portion and the middle portion of the fin.

19 . The method of claim 18 , wherein the residue material comprises an element of the first material.

20 . The method of claim 17 , further comprising:
scavenging the residue material at the center of the middle portion, the scavenging substantially eliminating the residue material at the center of the middle portion.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Wang Chih-Hao
• Tsai Ching-Wei
• Liu Chi-Wen
• Ching Kuo-Cheng
• Liaw Jhon Jhy
• Lien Wai-Yi

Classifications

• H10P95/06

  Planarisation of inorganic insulating materials · CPC title

• H10P14/6903

  containing silicon · CPC title

• H10P14/6308

  of Group IV semiconductors · CPC title

• H10P14/3411

  Silicon, silicon germanium or germanium · CPC title

• H10W10/181

  Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers · CPC title