Electronic Devices with Increased Creepage Distances

US2016365296A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016365296-A1
Application numberUS-201615176952-A
CountryUS
Kind codeA1
Filing dateJun 8, 2016
Priority dateJun 9, 2015
Publication dateDec 15, 2016
Grant date

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A device includes an encapsulation material and a first lead and a second lead protruding out of a surface of the encapsulation material. A recess extends into the surface of the encapsulation material. An elevation is arranged on the surface of the encapsulation material. The first lead protrudes out of the elevation.

First claim

Opening claim text (preview).

What is claimed is: 1 . A device, comprising: an encapsulation material; a first lead and a second lead protruding out of a surface of the encapsulation material; a recess extending into the surface of the encapsulation material; and a first elevation arranged on the surface of the encapsulation material, wherein the first lead protrudes out of the first elevation. 2 . The device of claim 1 , wherein the recess is arranged between the first lead and the second lead. 3 . The device of claim 1 , further comprising: a second elevation arranged on the surface of the encapsulation material, wherein the second lead protrudes out of the second elevation. 4 . The device of claim 3 , wherein the first elevation and the second elevation are of similar shape and dimension. 5 . The device of claim 1 , wherein the surface of the encapsulation material defines a plane and the recess has a depth lying in a range from 100 micrometers to 2 millimeters below the level of the plane. 6 . The device of claim 1 , wherein the surface of the encapsulation material defines a plane and the first elevation has a height lying in a range from 100 micrometers to 2 millimeters above the level of the plane. 7 . The device of claim 1 , wherein the first elevation forms a collar surrounding the first lead. 8 . The device of claim 1 , wherein at least one of the recess and the first elevation has a rectangular shape. 9 . The device of claim 1 , wherein the recess extends from a first main surface of the encapsulation material to a second main surface of the encapsulation material. 10 . The device of claim 1 , wherein the encapsulation material and the first elevation are formed integrally from a same material. 11 . The device of claim 1 , wherein the encapsulation material comprises at least one of an epoxy, a glass fiber filled epoxy, a glass fiber filled polymer, an imide, a filled or non-filled thermoplastic polymer material, a filled or non-filled duroplastic polymer material, a filled or non-filled polymer blend, a thermosetting material, a mold compound, a glob-top material, and a laminate material. 12 . The device of claim 1 , wherein a spacing between the first lead and the second lead lies in a range from 200 micrometers to 2 millimeters. 13 . The device of claim 1 , further comprising: a carrier; and a semiconductor chip arranged over a first surface of the carrier, wherein a second surface of the carrier opposite the first surface is exposed from the encapsulation material. 14 . The device of claim 13 , further comprising: a heatsink arranged over the second surface of the carrier. 15 . The device of claim 14 , further comprising: an electrically insulating and thermally conductive layer arranged between the encapsulation material and the heat sink. 16 . The device of claim 1 , further comprising: a semiconductor chip at least partly covered by the encapsulation material, wherein at least one of the first lead and the second lead is electrically coupled to the semiconductor chip. 17 . A device, comprising: an encapsulation material; a first lead and a second lead protruding out of a surface of the encapsulation material; a recess extending into the surface of the encapsulation material; and a first collar arranged on the surface of the encapsulation material, wherein the first collar surrounds the first lead. 18 . The device of claim 17 , wherein the recess is arranged between the first lead and the second lead. 19 . The device of claim 17 , further comprising: a second collar arranged on the surface of the encapsulation material, wherein the second collar surrounds the second lead. 20 . A device, comprising: a housing configured to accommodate a semiconductor chip, the housing comprising a surface with a first opening configured to accommodate a first lead and a second opening configured to accommodate a second lead; a recess extending into the surface of the housing; and an elevation arranged on the surface of the housing, wherein the elevation comprises the first opening. 21 . The device of claim 20 , wherein the recess is arranged between the first opening and the second opening.

Assignees

Inventors

Classifications

  • Encapsulations, e.g. protective coatings · CPC title

  • characterised by their shape or disposition · CPC title

  • multiple bond wires connected to common bond pads at both ends of the wires · CPC title

  • Dispositions of multiple bond wires · CPC title

  • changes in dispositions · CPC title

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Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US2016365296A1 cover?
A device includes an encapsulation material and a first lead and a second lead protruding out of a surface of the encapsulation material. A recess extends into the surface of the encapsulation material. An elevation is arranged on the surface of the encapsulation material. The first lead protrudes out of the elevation.
Who is the assignee on this patent?
Infineon Technologies Ag
What technology area does this patent fall under?
Primary CPC classification H10W70/465. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Dec 15 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).