Providing multiple roots in a semiconductor device

Patent metadata

Field	Value
Publication number	US-2016357700-A1
Application number	US-201514880443-A
Country	US
Kind code	A1
Filing date	Oct 12, 2015
Priority date	Jun 4, 2015
Publication date	Dec 8, 2016
Grant date	—

Abstract

In one embodiment, a system includes: a first root space associated with a first root space identifier and including at least one first host processor and a first agent, the at least one first host processor and the first agent associated with the first root space identifier; a second root space associated with a second root space identifier and including at least one second host processor and a second agent, the at least one second host processor and the second agent associated with the second root space identifier; and a shared fabric to couple the first root space and the second root space, the shared fabric to route a transaction to the first root space or the second root space based at least in part on a root space field of the transaction. Other embodiments are described and claimed.

First claim

What is claimed is:

1 . A system comprising:
at least one first processor and a first agent, the at least one first processor and the first agent associated with a first root space value to define a first root space; at least one second processor and a second agent, the at least one second processor and the second agent associated with a second root space value to define a second root space; and a shared fabric to couple to the at least one first processor, the first agent, the at least one second processor and the second agent, the shared fabric to route a transaction to the first root space or the second root space based at least in part on a root space value in a root space field of the transaction.

2 . The system of claim 1 , wherein the first root space comprises a privileged root to boot before the second root space and to configure the system.

3 . The system of claim 1 , wherein the first agent is to be dynamically assigned to the first root space value and thereafter to be dynamically assigned to the second root space value to be included in the second root space.

4 . The system of claim 1 , wherein the shared fabric is to isolate the first root space from the second root space.

5 . The system of claim 1 , further comprising a host bridge comprising a first logical host bridge associated with the first root space and a second logical host bridge associated with the second root space.

6 . The system of claim 5 , further comprising a system memory to be shared by the first root space and the second root space, the system memory having a first partition associated with the first root space and a second partition associated with the second root space.

7 . The system of claim 1 , further comprising a system bridge to couple the shared fabric to a second fabric, the second fabric included in the first root space.

8 . The system of claim 1 , wherein the first agent comprises a root logic to prevent access to an incoming transaction having a root space value in a root space field of the incoming transaction different than the first root space value.

9 . The system of claim 1 , wherein the first agent comprises a storage to be programmed with the first root space value.

10 . The system of claim 1 , wherein the system comprises a system on chip (SoC).

11 . A computer readable storage medium including information that, when manufactured into a system on a chip (SoC), is to configure the SoC to:
associate at least one first processor of the SoC and at least one first agent of the SoC with a first root space value, to define a first root space of the SoC; associate at least one second processor of the SoC and at least one second agent of the SoC with a second root space value, to define a second root space of the SoC; receive a transaction in a shared fabric coupled to the first root space and the second root space; and route the transaction to a selected one of the first root space and the second root space based at least in part on a root space value of a root space field of the transaction.

12 . The computer readable medium of claim 11 , wherein the information, when manufactured into the SoC, is to configure the SoC to enable the first root space to boot first to configure a system including the SoC, wherein the first root space comprises a privileged root.

13 . The computer readable medium of claim 11 , wherein the information, when manufactured into the SoC, is to configure the SoC to re-assign the at least one first agent from the first root space to the second root space by association of the at least one first agent with the second root space value.

14 . The computer readable medium of claim 11 , wherein the information, when manufactured into the SoC, is to configure the SoC to insert a root space value into a root space field of a first transaction directed to a destination agent into a security attribute indicator field of a second transaction, wherein the first transaction is to be received in the shared fabric via a primary interface of the shared fabric and the second transaction is to be communicated via a sideband interface of the shared fabric to the destination agent.

15 . The computer readable medium of claim 11 , wherein the information, when manufactured into the SoC, is to configure the SoC to enable the at least one first agent to dynamically be associated with the first root space value to cause the at least one agent to be included in the first root space, and thereafter to be dynamically associated with the second root space value to cause the at least one first agent to be included in the second root space.

16 . The computer readable medium of claim 11 , wherein the information, when manufactured into the SoC, is to configure the SoC to enable the shared fabric to isolate the first root space from the second root space.

17 . An apparatus comprising:
a semiconductor die including but not limited to:
a plurality of agents, at least a first subset of the plurality of agents associated with a first root space value to define a first root space and at least a second subset of the plurality of agents associated with a second root space value to define a second root space; and
a fabric coupled to the plurality of agents via a fabric primary interface, the fabric primary interface including at least one master interface to initiate transactions and at least one target interface to receive transactions, wherein the fabric is to route a transaction to the first root space or the second root space based at least in part on a root space value in a root space field of the transaction.

18 . The apparatus of claim 17 , wherein the fabric is to enable independent reset of the first root space and the second root space.

19 . The apparatus of claim 17 , wherein the apparatus comprises a system-on-chip (SoC) further comprising:
at least one first core associated with the first root space and at least one second core associated with the second root space; a first coherent interconnect coupled to the at least one first core; a second coherent interconnect coupled to the at least one second core; and a router coupled to at least some of the plurality of agents via a sideband interconnect.

20 . The apparatus of claim 17 , further comprising at least one component coupled to the fabric via a bridge, wherein the at least one component is of an open core protocol (OCP) or an ARM advanced microcontroller bus architecture (AMBA) protocol.

Assignees

• Intel Corp

Inventors

• Klinglesmith Michael T
• Kang Chang Yong
• Degruijl Robert
• Schoinas Ioannis T
• Abramson Darren
• Wooi Lee Khee

Classifications

• G06F13/4282 Primary

  on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247) · CPC title

• G06F3/0604

  Improving or facilitating administration, e.g. storage management · CPC title

• G06F2212/621

  Coherency control relating to peripheral accessing, e.g. from DMA or I/O device · CPC title

• G06F3/068

  Hybrid storage device · CPC title

• G06F13/1663

  Access to shared memory · CPC title