Package structures having integrated waveguides for high speed communications between package components
US-2016276727-A1 · Sep 22, 2016 · US
US2016344084A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2016344084-A1 |
| Application number | US-201514720656-A |
| Country | US |
| Kind code | A1 |
| Filing date | May 22, 2015 |
| Priority date | May 22, 2015 |
| Publication date | Nov 24, 2016 |
| Grant date | — |
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A waveguide. The waveguide may include a first waveguide region that includes a signal trace with a first width. The waveguide may further include a second waveguide region that includes the signal trace with a second width. The first width may be different from the second width. The signal trace may be configured to transmit an electrical signal. The signal trace with the second width may be configured to couple with an integrated circuit.
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What is claimed is: 1 . A waveguide, comprising: a first waveguide region comprising a signal trace with a first width; and a second waveguide region comprising the signal trace with a second width, wherein the first width is different from the second width, wherein the signal trace is configured to transmit an electrical signal, and wherein the signal trace with the second width is configured to couple with an integrated circuit. 2 . The waveguide of claim 1 , wherein the first waveguide region comprises a first substrate comprising a first thickness and a first ground plane disposed underneath the first substrate and opposite the signal trace, wherein the second waveguide region comprises a second substrate comprising a second thickness and a second ground plane disposed underneath the second substrate and opposite the signal trace, and wherein the first thickness exceeds the second thickness. 3 . The waveguide of claim 2 , wherein the first substrate and the second substrate comprises a dielectric medium configured to contain electro-magnetic energy during transmission of the electrical signal through the signal trace. 4 . The waveguide of claim 2 , further comprising: a transition region comprising the signal trace and located between the first waveguide region and the second waveguide region. 5 . The waveguide of claim 2 , further comprising: a third ground plane disposed on the first substrate and the second substrate, wherein the signal trace is separated from the third ground plane by a substantially constant gap in the first waveguide region and the second waveguide region. 6 . The waveguide of claim 5 , further comprising: a via connecting the third ground plane, the second ground plane, and the first ground plane. 7 . The waveguide of claim 1 , wherein the first waveguide region is a grounded coplanar waveguide (GCWG). 8 . A system for providing an electrical transmission line, comprising: a waveguide comprising a signal trace, a first waveguide region, and a second waveguide region, wherein the first waveguide region comprises the signal trace with a first width, wherein the second waveguide region comprises the signal trace with a second width, and wherein the first width is different from the second width; and an integrated circuit coupled to the signal trace with the second width, wherein the signal trace is configured to transmit an electrical signal to the integrated circuit. 9 . The system of claim 8 , wherein the integrated circuit is coupled to the signal trace with the second width using a ball grid array having a plurality of solder pads, wherein the plurality of solder pads comprises a predetermined pitch size between a respective pair of the plurality of solder pads, and wherein the signal trace with the second width substantially aligns with the predetermined pitch size. 10 . The system of claim 8 , wherein the first waveguide region comprises a first substrate comprising a first thickness and a first ground plane disposed underneath the first substrate and opposite the signal trace, wherein the second waveguide region comprises a second substrate comprising a second thickness and a second ground plane disposed underneath the second substrate and opposite the signal trace, and wherein the first thickness exceeds the second thickness. 11 . The system of claim 10 , further comprising: wherein the waveguide comprises a transition region, wherein the transition region comprises the signal trace and is located between the first waveguide region and the second waveguide region. 12 . The system of claim 10 , further comprising: a third ground plane disposed on the first substrate and the second substrate, wherein the signal trace is separated from the third ground plane by a substantially constant gap in the first waveguide region and the second waveguide region. 13 . The system of claim 12 , further comprising: a via connecting the third ground plane, the second ground plane, and the first ground plane. 14 . A method of manufacturing, comprising: disposing a signal trace on a first substrate and a second substrate, the signal trace having a first width above the first substrate and a second width above the second substrate, wherein the first width is different from the second width; and forming a first ground plane underneath the first substrate and opposite the signal trace for a first waveguide region; and forming a second ground plane underneath the second substrate and opposite the signal trace for a second waveguide region, and wherein the signal trace is configured to transmit an electrical signal through the first waveguide region and the second waveguide region. 15 . The method of claim 14 , further comprising: coupling an integrated circuit to the signal trace with the second width. 16 . The method of claim 15 , further comprising: wherein the integrated circuit is coupled to the signal trace with the second width using a ball grid array having a plurality of solder pads, wherein the plurality of solder pads comprises a predetermined pitch size between a respective pair of the plurality of solder pads, and wherein the signal trace with the second width substantially aligns with the predetermined pitch size. 17 . The method of claim 14 , further comprising: disposing a third ground plane on the first substrate and the second substrate. 18 . The method of claim 17 , further comprising: forming a via connecting the third ground plane, the second ground plane, and the first ground plane. 19 . The method of claim 17 , wherein the third ground plane is separated from the signal trace with a substantially constant gap. 20 . The method of claim 14 , wherein the first substrate and the second substrate are configured to be a dielectric medium for storing electro-magnetic energy during transmission of the electrical signal through the signal trace.
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High frequency adaptations (H05K1/0216 takes precedence) · CPC title
by soldering · CPC title
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