Zener triggered silicon controlled rectifier with small silicon area

Patent metadata

Field	Value
Publication number	US-2016343701-A1
Application number	US-201615093725-A
Country	US
Kind code	A1
Filing date	Apr 7, 2016
Priority date	May 19, 2015
Publication date	Nov 24, 2016
Grant date	—

Abstract

A semiconductor device includes a P-type semiconductor substrate, an N-well and a P-well disposed adjacent to each other and extending along a first direction within the P-type semiconductor substrate, a first N+ doped region and a first P+ doped region extending along the first direction within the N-well and spaced away from each other along a second direction perpendicular to the first direction, a second N+ doped region and a second P+ doped region extending along the first direction within the P-well and spaced away from each other along the second direction, and a plurality of third N+ doped regions and a plurality of P+ doped regions alternatively disposed in a junction region formed between the N-well and P-well the third N+ doped regions. The third N+ doped regions and the third P+ doped regions form a Zener diode.

First claim

What is claimed is:

1 . A semiconductor device comprising:
a P-type semiconductor substrate; an N-well and a P-well disposed adjacent to each other and extending along a first direction within the P-type semiconductor substrate; a first N+ doped region and a first P+ doped region extending along the first direction within the N-well and spaced away from each other along a second direction perpendicular to the first direction; a second N+ doped region and a second P+ doped region extending along the first direction within the P-well and spaced away from each other along the second direction; and a plurality of third N+ doped regions and a plurality of P+ doped regions alternatively disposed in a junction region formed between the N-well and P-well and extending along the first direction, the third N+ doped regions and the third P+ doped regions being separated from the adjacent first P+ doped region and second N+ doped region, wherein the third N+ doped regions and the third P+ doped regions form a Zener diode.

2 . The semiconductor device of claim 1 , wherein the first N+ doped region and the first P+ doped region are connected to each other to form an anode of a silicon controlled rectifier (SCR) device.

3 . The semiconductor device of claim 1 , wherein the second N+ doped region and the second P+ doped region are connected to each other to form a cathode of a silicon controlled rectifier (SCR) device.

4 . The semiconductor device of claim 1 , wherein the semiconductor device comprises an NPN transistor and a PNP transistor, and the Zener diode being disposed between a base of the NPN transistor and a base of the PNP transistor.

5 . The semiconductor device of claim 1 , further comprising a first insulation structure disposed between the first N+ doped region and the first P+ doped region, and a second insulation structure disposed between the second N+ doped region and the second P+ doped region.

6 . The semiconductor device of claim 5 , wherein the first and second insulator structures are shallow trench insulator structures.

7 . An electronic device comprising a semiconductor device and an electronic component connected to the semiconductor device, wherein the semiconductor device comprises:
a P-type semiconductor substrate; an N-well and a P-well disposed adjacent to each other and extending along a first direction within the P-type semiconductor substrate; a first N+ doped region and a first P+ doped region extending along the first direction within the N-well and spaced away from each other along a second direction perpendicular to the first direction; a second N+ doped region and a second P+ doped region extending along the first direction within the P-well and spaced away from each other along the second direction; and a plurality of third N+ doped regions and a plurality of P+ doped regions alternatively disposed in a junction region formed between the N-well and P-well and extending along the first direction, the third N+ doped regions and the third P+ doped regions being separated from the adjacent first P+ doped region and second N+ doped region, wherein the third N+ doped regions and the third P+ doped regions form a Zener diode.

8 . A Zener-triggered silicon controlled rectifier (SCR) device including a first node and a second node, the Zener-triggered SCR device comprising:
a P-type semiconductor substrate; an N-well and a P-well disposed adjacent to each other and extending along a first direction within the P-type semiconductor substrate; a first N+ doped region and a first P+ doped region extending along the first direction within the N-well and separated from each other by a first shallow trench insulation structure; a second N+ doped region and a second P+ doped region extending along the first direction within the P-well and separated from each other by a second shallow trench insulation structure; a plurality of third N+ doped regions and a plurality of P+ doped regions alternatively disposed in a junction region formed between the N-well and the P-well to form a Zener diode; a PNP transistor having a base and its emitter connected to the first node; and an NPN transistor having an emitter connected to the second node.

9 . The Zener-triggered SCR device of claim 8 , further comprising:
a first resistor connected between the base of the PNP transistor and the first node; and a second resistor connected between a base of the NPN transistor and the second node.

10 . The Zener-triggered SCR device of claim 9 , wherein the Zener diode is connected between the base of the PNP transistor and the base of the NPN transistor.

Assignees

• Semiconductor Mfg Int Shanghai Corp

Inventors

• Zhong Lei
• Li Hongwei
• Lei Wei
• Cheng Huijuan

Classifications

• H10D84/619

  Combinations of lateral BJTs and one or more of diodes, resistors or capacitors · CPC title

• H10D84/611

  Combinations of BJTs and one or more of diodes, resistors or capacitors · CPC title

• H10D62/115

  Dielectric isolations, e.g. air gaps · CPC title

• H10D8/80

  PNPN diodes, e.g. Shockley diodes or break-over diodes · CPC title

• H10D89/713 Primary

  including a PNP transistor and a NPN transistor, wherein each of said transistors has its base region coupled to the collector region of the other transistor, e.g. silicon controlled rectifier [SCR] devices · CPC title