Solid-state imaging device and electronic apparatus

Patent metadata

Field	Value
Publication number	US-2016336364-A1
Application number	US-201615219007-A
Country	US
Kind code	A1
Filing date	Jul 25, 2016
Priority date	Jan 15, 2009
Publication date	Nov 17, 2016
Grant date	—

Abstract

A solid-state imaging device includes a layout in which one sharing unit includes an array of photodiodes of 2 pixels by 4×n pixels (where, n is a positive integer), respectively, in horizontal and vertical directions.

First claim

What is claimed is:

1 . A solid-state imaging device comprising:
a first structural unit including a first transfer transistor group sharing a first floating diffusion, the first transfer transistor group including four transfer transistors arranged around the first floating diffusion; and a second structural unit including a second transfer transistor group sharing a second floating diffusion, the second transfer group including four transfer transistors arranged around the second floating diffusion; wherein the first and second floating diffusions are coupled to each other in a first direction, wherein the first and second transfer transistor groups share at least an amplification transistor and a reset transistor, the amplification transistor coupled to a select transistor, wherein a select wiring coupled to a gate electrode of the select transistor extends along the first direction, and wherein a first power supply wiring coupled to a drain region of the reset transistor extends along a second direction different from the first direction.

2 . The solid-state imaging device according to claim 1 , wherein a second power supply wiring coupled to a drain region of the amplification transistor extends along the first direction.

3 . The solid-state imaging device according to claim 2 , wherein the first and second power supply wirings are formed in first and second layers respectively.

4 . The solid-state imaging device according to claim 2 , wherein each gate electrode of the first and second transfer transistor groups is substantially triangular or trapezoidal in shape.

5 . The solid-state imaging device according to claim 3 , wherein a reset wiring coupled to a gate electrode of the reset transistor extends along the second direction.

6 . The solid-state imaging device according to claim 5 , wherein each gate electrode of the first and second transfer transistor groups is coupled to a readout wiring extending along the second direction.

7 . The solid-state imaging device according to claim 6 , wherein a first connection wiring is coupled to the first floating diffusion, the second floating diffusion, an amplification gate electrode of the amplification transistor, and a source region of the reset transistor.

8 . The solid-state imaging device according to claim 7 , wherein a third power supply wiring coupled to a drain region of the select transistor extends along the first direction.

9 . The solid-state imaging device according to claim 8 , wherein a signal wiring coupled to a source region of the amplification transistor extends along the first direction.

10 . The solid-state imaging device according to claim 9 , wherein a second connection wiring is formed in a transverse direction to connect with the select wiring.

11 . The solid-state imaging device according to claim 10 , wherein the second connection wiring covers an entire width of the sharing unit.

12 . The solid-state imaging device according to claim 11 , wherein readout wirings which are connected to readout gate electrodes are formed in the transverse direction.

13 . The solid-state imaging device according to claim 12 , wherein the readout wirings are formed between adjacent pixels.

14 . The solid-state imaging device according to claim 2 , wherein the amplification transistor has an active region comprising a source region of the amplification transistor, the drain region of the amplification transistor, and a channel region, wherein the active region extends from the source region to the drain region of the amplification transistor via the channel region, wherein the active region is formed in a cross shape, and wherein the amplification gate electrode is formed on a vertical portion of the channel region.

15 . The solid-state imaging device according to claim 14 , wherein a reset gate electrode of the reset transistor is formed in a transverse direction with a length of two pixel pitches.

16 . The solid-state imaging device according to claim 10 , wherein the first connection wiring, the second connection wiring, a select transistor power supply wiring, the select wiring, and the readout wirings are formed in a four-layer wiring structure.

17 . An electronic apparatus comprising:
a solid-state imaging device comprising:
a first structural unit including a first transfer transistor group sharing a first floating diffusion, the first transfer transistor group including four transfer transistors arranged around the first floating diffusion; and
a second structural unit including a second transfer transistor group sharing a second floating diffusion, the second transfer transistor group including four transfer transistors arranged around the second floating diffusion;
wherein the first and second floating diffusions are coupled to each other in a first direction,
wherein the first and second transfer transistor groups share at least an amplification transistor and a reset transistor, the amplification transistor coupled to a select transistor,
wherein a select wiring coupled to a gate electrode of the select transistor extends along the first direction, and
wherein a first power supply wiring coupled to a drain region of the reset transistor extends along a second direction different from the first direction.

Assignees

• Sony Corp

Inventors

• Itonaga Kazuichiro
• Matsumoto Shizunori

Classifications

• H04N25/70

  SSIS architectures; Circuits associated therewith · CPC title

• H04N25/76

  Addressed sensors, e.g. MOS or CMOS sensors · CPC title

• H04N25/77

  Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components · CPC title

• H04N25/134

  based on three different wavelength filter elements · CPC title

• H04N25/778

  comprising amplifiers shared between a plurality of pixels, i.e. at least one part of the amplifier must be on the sensor array itself · CPC title