Emitter and method for manufacturing the same

Patent metadata

Field	Value
Publication number	US-2016308084-A1
Application number	US-201615079472-A
Country	US
Kind code	A1
Filing date	Mar 24, 2016
Priority date	Apr 15, 2015
Publication date	Oct 20, 2016
Grant date	—

Abstract

A method for manufacturing an emitter comprises providing a semiconductor substrate having a main surface, the semiconductor substrate comprising a cavity adjacent to the main surface. A portion of the semiconductor substrate arranged between the cavity and the main surface of the semiconductor substrate forms a support structure. The method comprises arranging an emitting element at the support structure, the emitting element being configured to emit a thermal radiation of the emitter, wherein the cavity provides a reduction of a thermal coupling between the emitting element and the semiconductor substrate.

First claim

1 . A method for manufacturing an emitter, the method comprising:
providing a semiconductor substrate having a main surface, the semiconductor substrate comprising a cavity adjacent to the main surface, wherein a portion of the semiconductor substrate arranged between the cavity and the main surface of the semiconductor substrate forms a support structure; and arranging an emitting element at the support structure, the emitting element being configured to emit a thermal radiation of the emitter, wherein the cavity provides a reduction of a thermal coupling between the emitting element and the semiconductor substrate.

2 . The method according to claim 1 , wherein the emitting element is arranged such that the support structure is arranged between the cavity and the emitting element.

3 . The method according to claim 1 , wherein providing the semiconductor substrate comprises:
arranging the semiconductor substrate; and forming the cavity in the semiconductor substrate with a silicon-on-nothing process or a Venezia process such that the cavity is encapsulated by the semiconductor substrate and such that the semiconductor substrate and the support structure comprise a monocrystalline structure.

4 . The method according to claim 3 , wherein providing the semiconductor substrate further comprises:
forming at least a second cavity arranged between the cavity and the main surface such that the second cavity is arranged between the support structure and such that a portion of the semiconductor substrate comprising the main surface at least partially covers the support structure.

5 . The method according to claim 3 , wherein the cavity is formed such that the support structure and the semiconductor substrate are connected to each other by an integrally formed pillar-structure extending from the support structure along a direction parallel to a surface normal of the main surface.

6 . The method according to claim 1 , wherein arranging the emitting element comprises doping of at least a portion of the support structure or arranging a thermal emitting material at the support structure.

7 . The method according to claim 6 , wherein arranging the emitting element comprises:
producing an oxide layer at the main surface of the semiconductor substrate and at the support structure such that the oxide layer connects the main surface of the semiconductor substrate and a main surface of the support structure; and arranging the thermal emitting material at the oxide layer at a region thereof arranged at the support structure.

8 . The method according to claim 1 , further comprising:
producing a sealing structure at the main surface such that at least a portion of the support structure remains uncovered by the sealing structure and such that a third cavity is obtained at the support structure uncovered by the sealing structure and such that the emitting element is arranged between the cavity and the third cavity.

9 . The method according to claim 8 , wherein producing the sealing structure comprises:
depositing a sacrificial material at the portion of the support structure; depositing a sealing material of the sealing structure at the main surface and at the sacrificial material; and removing the sacrificial material such that the third cavity is formed.

10 . The method according to claim 9 , wherein depositing the sealing material comprises depositing an oxide material with a high density plasma process.

11 . The method according to claim 8 , further comprising:
forming a connection between the cavity and the third cavity through the main surface adjacent to the support structure such that a thermal coupling between the support structure and the semiconductor substrate is reduced.

12 . The method according to claim 8 , further comprising:
separating the support structure and the semiconductor substrate such that the support structure is mechanically fixed by the sealing material or by the sacrificial material and not fixed by the semiconductor substrate.

13 . The method according to claim 1 , further comprising permanently reducing an atmospheric pressure in the cavity when compared to an ambient pressure of the semiconductor substrate.

14 . The method according to claim 1 , further comprising producing an electric connection to the emitting element.

15 . An emitter comprising:
a semiconductor substrate having a main surface, the semiconductor substrate comprising a cavity adjacent to the main surface, wherein a portion of the semiconductor substrate arranged between the cavity and the main surface of the semiconductor substrate forms a support structure; and an emitting element arranged at the support structure, the emitting element being configured to emit a thermal radiation of the emitter; wherein the cavity provides a reduction of a thermal coupling between the emitting element and the semiconductor substrate.

16 . The emitter according to claim 15 , wherein the semiconductor substrate and the support structure comprise a monocrystalline semiconductor material.

17 . The emitter according to claim 15 , further comprising a sealing structure at the main surface, wherein a third cavity is arranged at a portion of the support structure uncovered by the sealing structure, wherein the emitting element is arranged between the cavity and the third cavity.

18 . The emitter according to claim 17 , wherein the support structure is mechanically fixed by the sealing structure or by a sacrificial material different from a material of the semiconductor substrate and not fixed by the semiconductor substrate.

19 . The emitter according to claim 17 , further comprising an electric connection to the emitting element, wherein the electric connection is arranged through the sealing structure.

20 . The emitter according to claim 15 , wherein an atmospheric pressure in the cavity is reduced when compared to an ambient pressure of the emitter.

21 . The emitter according to claim 15 , wherein the cavity comprises an extension along a direction parallel to a surface normal of the main surface, the extension being at least 20 nm and at most 1 mm.

22 . A sensor comprising:
an emitter according to claim 15 ; and a sensor element configured for receiving the thermal radiation and for determining a spectral absorption of the thermal radiation of a material arranged between the sensor element and the emitting element, the spectral absorption caused by the thermal radiation traveling through the material arranged between the sensor element and the emitting element.

Assignees

• Infineon Technologies Dresden Gmbh

Inventors

• Bieselt Steffen
• Froehlich Heiko
• Kautzsch Thoralf
• Stegemann Maik
• Vogt Mirko

Classifications

• H01L33/34

  Electricity · mapped topic

• H01L31/16 Primary

  Electricity · mapped topic

• H01L33/0054

  Electricity · mapped topic

• H01L33/20

  Electricity · mapped topic

• G21K5/00

  Irradiation devices (discharge tubes for irradiating H01J37/00) · CPC title