Quantum cascade semiconductor laser

US2016294160A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016294160-A1
Application numberUS-201615088600-A
CountryUS
Kind codeA1
Filing dateApr 1, 2016
Priority dateApr 3, 2015
Publication dateOct 6, 2016
Grant date

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A quantum cascade semiconductor laser includes a substrate and a semiconductor region provided on a principal surface of the substrate, the semiconductor region including a mesa waveguide, a first burying region provided on a first side surface of the mesa waveguide, and a second burying region provided on a second side surface of the mesa waveguide. Each of the first and second burying regions includes a plurality of laminate regions and a plurality of bulk semiconductor regions that are alternately arrayed. The laminate regions are separated from each other by the bulk semiconductor region. The bulk semiconductor regions are provided on side surfaces of the laminate regions so as to embed the laminate regions. Each of the laminate regions includes a semiconductor laminate structure having a plurality of semiconductor layers.

First claim

Opening claim text (preview).

What is claimed is: 1 . A quantum cascade semiconductor laser comprising: a substrate including a first region, a second region, and a third region that are arranged along a first axis, the third region being provided between the first region and the second region; and a semiconductor region provided on a principal surface of the substrate, the semiconductor region including a mesa waveguide provided on the third region of the substrate, a first burying region provided on a first side surface of the mesa waveguide and the first region of the substrate, and a second burying region provided on a second side surface of the mesa waveguide and the second region of the substrate, wherein each of the first burying region and the second burying region includes a plurality of laminate regions and a plurality of bulk semiconductor regions that are alternately arrayed in a direction of the first axis, the laminate regions are separated from each other by the bulk semiconductor regions, the bulk semiconductor regions are provided on side surfaces of the laminate regions so as to embed the laminate regions, and each of the laminate regions includes a semiconductor laminate structure having a plurality of semiconductor layers. 2 . The quantum cascade semiconductor laser according to claim 1 , wherein the mesa waveguide includes a core layer and an upper cladding layer disposed on the core layer, and the semiconductor laminate structure of the laminate region includes the core layer and the upper cladding layer. 3 . The quantum cascade semiconductor laser according to claim 2 , wherein the core layer includes active layers for emitting light and injection layers for injecting a carrier into the active layers, and the active layers and the injection layers are alternately stacked. 4 . The quantum cascade semiconductor laser according to claim 1 , wherein the bulk semiconductor region includes at least one of semi-insulating semiconductor or undoped semiconductor. 5 . The quantum cascade semiconductor laser according to claim 1 , wherein the bulk semiconductor region includes first bulk portions, and the first bulk portions and the laminate regions are alternately arrayed in the direction of the first axis. 6 . The quantum cascade semiconductor laser according to claim 1 , wherein the bulk semiconductor region includes second bulk portions, and the second bulk portions and the laminate regions are alternately arrayed in a direction of a second axis intersecting the first axis. 7 . The quantum cascade semiconductor laser according to claim 1 , further comprising an upper electrode provided on the semiconductor region, the upper electrode being in contact with a top surface of the mesa waveguide; and a dielectric insulating film provided between the upper electrode and the first and second burying regions. 8 . The quantum cascade semiconductor laser according to claim 7 , wherein the dielectric insulating film is made of at least one of SiO2, SiON, SiN, alumina, BCB resin, or polyimide resin. 9 . The quantum cascade semiconductor laser according to claim 1 , further comprising an upper electrode provided on the semiconductor region, the upper electrode being in contact with a top surface of the mesa waveguide; and a semiconductor capping layer provided between the upper electrode and the first and second burying regions, wherein the semiconductor capping layer includes at least one of an undoped semiconductor layer or a semi-insulating semiconductor layer. 10 . The quantum cascade semiconductor laser according to claim 9 , wherein the semiconductor capping layer includes a semi-insulating semiconductor layer doped with a transition metal including at least one of Fe, Ti, Cr, or Co. 11 . The quantum cascade semiconductor laser according to claim 1 , wherein the bulk semiconductor region includes a semi-insulating semiconductor layer doped with a transition metal including at least one of Fe, Ti, Cr, or Co. 12 . The quantum cascade semiconductor laser according to claim 2 , wherein the upper cladding layer is made of InP. 13 . The quantum cascade semiconductor laser according to claim 1 , wherein the substrate is made of an n-type InP.

Assignees

Inventors

Classifications

  • H01S5/227Primary

    Buried mesa structure {; Striped active layer} · CPC title

  • H01S5/3402Primary

    intersubband lasers, e.g. transitions within the conduction or valence bands · CPC title

  • semi-insulating semiconductors · CPC title

  • mesa created by etching · CPC title

  • Structure or details of the laser chip to manipulate the heat flow, e.g. passive layers in the chip with a low heat conductivity · CPC title

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What does patent US2016294160A1 cover?
A quantum cascade semiconductor laser includes a substrate and a semiconductor region provided on a principal surface of the substrate, the semiconductor region including a mesa waveguide, a first burying region provided on a first side surface of the mesa waveguide, and a second burying region provided on a second side surface of the mesa waveguide. Each of the first and second burying regions…
Who is the assignee on this patent?
Sumitomo Electric Industries
What technology area does this patent fall under?
Primary CPC classification H01S5/227. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Oct 06 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).