Cavity bridge connection for die split architecture

Patent metadata

Field	Value
Publication number	US-2016293572-A1
Application number	US-201514673435-A
Country	US
Kind code	A1
Filing date	Mar 30, 2015
Priority date	Mar 30, 2015
Publication date	Oct 6, 2016
Grant date	—

Abstract

An integrated circuit (IC) package structure may include a substrate. The substrate may include a semiconductor bridge having a first surface directly on a surface of the substrate that faces a first semiconductor die and a second semiconductor die. The semiconductor bridge may be disposed within a cavity extending through a photo-sensitive layer on the surface of the substrate. The semiconductor bridge may have an exposed, second surface substantially flush with the photo-sensitive layer. The first semiconductor die and the second semiconductor die are supported by the substrate and coupled together through the semiconductor bridge.

First claim

1 . An integrated circuit (IC) package structure, comprising:
a substrate; a semiconductor bridge having a first surface directly on a surface of the substrate facing a first semiconductor die and a second semiconductor die, the semiconductor bridge disposed within a cavity extending through a photo-sensitive layer on the surface of the substrate and having an exposed, second surface substantially flush with the photo-sensitive layer; and the first semiconductor die and the second semiconductor die supported by the substrate and coupled together through the semiconductor bridge.

2 . The integrated circuit package structure of claim 1 , in which the substrate further comprises a contact layer including a dielectric layer on a core substrate and at least one conductive contact surrounded by the dielectric layer.

3 . The integrated circuit package structure of claim 1 , in which the photo-sensitive layer comprises a multilayer photo-sensitive region including layers of a photo-imageable dielectric (PID) material.

4 . The integrated circuit package structure of claim 3 , in which the PID material comprises polybenzoxazole (PBO).

5 . The integrated circuit package structure of claim 1 in which the substrate is a non-symmetric structure including a solder resist build-up layer opposite the surface of the substrate facing the first semiconductor die and the second semiconductor die.

6 . The integrated circuit package structure of claim 1 , in which the photo-sensitive layer directly contacts sidewalls of the semiconductor bridge.

7 . The integrated circuit package structure of claim 1 , in which the substrate comprises an Ajinomoto Build-up Film (ABF) substrate.

8 . The integrated circuit package structure of claim 1 , in which a package is coupled to a molding compound surrounding the first semiconductor die and the second semiconductor die.

9 . The integrated circuit package structure of claim 1 , in which a package is directly stacked on a molding compound surrounding the first semiconductor die and the second semiconductor die.

10 . The integrated circuit package structure of claim 1 , incorporated into at least one of a music player, a video player, an entertainment unit, a navigation device, a communications device, a personal digital assistant (PDA), a fixed location data unit, and a computer.

11 . A method for fabricating an integrated circuit (IC) package structure, comprising:
depositing at least one photo-sensitive layer on a surface of a substrate facing a first semiconductor die and a second semiconductor die; etching the photo-sensitive layer to form a cavity through the photo-sensitive layer to the surface of the substrate; placing a semiconductor bridge within the cavity and directly on the surface of the substrate, the photo-sensitive layer contacting sidewalls of the semiconductor bridge; and then attaching the first die and the second die to the IC package structure, in which the first die and the second die are coupled together through the semiconductor bridge.

12 . The method for fabricating the IC package structure of claim 11 , further comprising:
fabricating a contact layer on the substrate, the contact layer including at least one first conductive contact coupled to a through substrate via; and fabricating at least one second conductive contact within the photo-sensitive layer and coupled to the at least one first conductive contact and configured to couple a first conductive interconnect to the contact layer.

13 . The method for fabricating the IC package structure of claim 12 , in which attaching further comprises coupling the first die and the second die to the IC package structure using the first conductive interconnect.

14 . The method for fabricating the IC package structure of claim 11 , further comprising coupling a package to a molding compound surrounding the first semiconductor die and the second semiconductor die to form a package-on-package (POP) IC structure.

15 . The method for fabricating the IC package structure of claim 11 , further comprising incorporating the IC package structure into at least one of a music player, a video player, an entertainment unit, a navigation device, a communications device, a personal digital assistant (PDA), a fixed location data unit, and a computer.

16 . An integrated circuit (IC) package structure, comprising:
a substrate; a semiconductor bridge having a first surface directly on a surface of the substrate facing a first semiconductor die and a second semiconductor die supported by the substrate, the semiconductor bridge disposed within a cavity extending through a photo-sensitive layer on the surface of the substrate and having an exposed, second surface substantially flush with the photo-sensitive layer; and means for coupling the first semiconductor die and the second semiconductor die through the semiconductor bridge.

17 . The integrated circuit package structure of claim 16 , in which the substrate further comprises a contact layer including a dielectric layer on a core substrate and at least one conductive contact surrounded by the dielectric layer.

18 . The integrated circuit package structure of claim 16 , in which the photo-sensitive layer comprises a multilayer photo-sensitive region including layers of a photo-imageable dielectric (PID) material.

19 . The integrated circuit package structure of claim 18 , in which the PID material comprises polybenzoxazole (PBO).

20 . The integrated circuit package structure of claim 16 in which the substrate is a non-symmetric structure including a solder resist build-up layer opposite the surface of the substrate facing the first semiconductor die and the second semiconductor die.

21 . The integrated circuit package structure of claim 16 , in which the photo-sensitive layer directly contacts sidewalls of the semiconductor bridge.

22 . The integrated circuit package structure of claim 16 , in which the substrate comprises an Ajinomoto Build-up Film (ABF) substrate.

23 . The integrated circuit package structure of claim 16 , in which a package is coupled to a molding compound surrounding the first semiconductor die and the second semiconductor die.

24 . The integrated circuit package structure of claim 16 , in which a package is directly stacked on a molding compound surrounding the first semiconductor die and the second semiconductor die.

25 . The integrated circuit package structure of claim 16 , incorporated into at least one of a music player, a video player, an entertainment unit, a navigation device, a communications device, a personal digital assistant (PDA), a fixed location data unit, and a computer.

26 . A method for fabricating an integrated circuit (IC) package structure, comprising:
a step for depositing at least one photo-sensitive layer on a surface of a substrate facing a first semiconductor die and a second semiconductor die; a step for etching the photo-sensitive layer to form a cavity through the photo-sensitive layer to the surface of the substrate; a step for placing a semiconductor bridge within the cavity and directly on the surface of the substrate, the photo-sensitive layer contacting sidewalls of the semiconductor bridge; and then a step for attaching the first die and the second die to the IC package structure, in which the first die and the second die are coupled together through the semiconductor bridge.

Assignees

• Qualcomm Inc

Inventors

• We Hong Bok
• Lee Jae Sik
• Kim Dong Wook

Classifications

• H10W90/733

  between laterally-adjacent chips · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/722

  between stacked chips · CPC title

• H10W72/252

  comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu · CPC title

• H10W72/242

  relative to the surface, e.g. recessed, protruding · CPC title