Enhanced Echo Cancellation in Full-Duplex Communication

Patent metadata

Field	Value
Publication number	US-2016285483-A1
Application number	US-201514651203-A
Country	US
Kind code	A1
Filing date	Jan 5, 2015
Priority date	Jan 5, 2015
Publication date	Sep 29, 2016
Grant date	—

Abstract

Embodiments relate to enhancing echo cancellation in a transceiver integrated circuit (IC) for full-duplex communication by providing a signal path connected to a dummy driver that replicates a signal path between a main driver and a counterpart transceiver IC to cause a duplicated signal generated by the dummy driver to more closely replicate a sending signal generated by the main driver. The signal path connected to the dummy driver includes circuit elements having transmission line parameters and RLC parameters that replicate transmission line parameters and RLC parameters of circuit elements in the signal path between the main driver and the counterpart transceiver IC.

First claim

What is claimed is:

1 . A full-duplex transceiver, comprising:
an integrated circuit package comprising:
a first driver coupled to a data input circuit to receive a digital signal and generate a first signal to a first pad according to the received digital signal, the first pad coupled to a communication channel between the full-duplex transceiver and a counterpart full-duplex transceiver,
a second driver coupled to the data input circuit to receive the digital signal and generate a second signal corresponding to the first signal to a second pad according to the digital signal received from the data input, the second pad coupled to a termination in the full-duplex transceiver, and
an echo cancelation circuit having an output, a first input coupled to the first pad, and a second input coupled to the second pad, the echo cancelation circuit configured to generate at the output a difference signal representing a voltage difference between the first pad and the second pad;
first components between the communication channel and the first pad; and second components between the second pad and the termination.

2 . The full-duplex transceiver of claim 1 , wherein the first components comprise conductive element between the first pad and a first pin of the integrated circuit package, and wherein the second components comprise conductive element between the second pad and the second pin of the integrated circuit package.

3 . The full-duplex transceiver of claim 2 , wherein the first components further comprise (i) a first printed circuit board (PCB) trace, (ii) first passive circuit elements connected to the first PCB trace and (iii) a connector between the first passive circuit elements and the communication channel, wherein the second components further comprise (i) a second printed circuit board (PCB) trace and (ii) second passive circuit elements between the second PCB trace and the termination.

4 . The full-duplex transceiver of claim 3 , wherein a transmission line parameter and a RLC parameter of the termination are same as a transmission line parameter and a RLC parameter of a termination in an integrated package of a counterpart full-duplex transceiver connected to a driver of the counterpart full-duplex transceiver corresponding to the first driver of the full-duplex transceiver.

5 . The full-duplex transceiver of claim 3 , wherein each of the first and second passive circuit elements comprise at least one of an electrostatic discharge protection circuit, and a common mode choke (CMC) circuit.

6 . The full-duplex transceiver of claim 1 , further comprising an equalizer coupled to the output of the echo cancelation circuit, the equalizer configured to (i) compensate for attenuation of a receiving signal included in the difference signal and (ii) provide a compensated version of the receiving signal to a data output circuit.

7 . The full-duplex transceiver of claim 6 , wherein the data input circuit comprises a serializer and the data output circuit comprises a de-serializer.

8 . The full-duplex transceiver of claim 1 , wherein a transmission line parameter and a RLC parameter of the termination are same as a transmission line parameter and a RLC parameter of a termination in an integrated package of a counterpart full-duplex transceiver connected to a driver of the counterpart full-duplex transceiver corresponding to the first driver of the full-duplex transceiver.

9 . The full-duplex transceiver of claim 1 , wherein each of the first driver and the second driver includes differential outputs.

10 . The full-duplex transceiver of claim 9 , wherein a negative output of the first driver and a negative output of the second driver are placed between a positive output of the first driver and a positive output of the second driver.

11 . The full-duplex transceiver of claim 9 , wherein a positive output of the first driver and a positive output of the second driver are placed between a negative output of the first driver and a negative output of the second driver.

12 . A method of performing full-duplex communication, comprising:
receiving a digital signal from a data input circuit at a first driver and a second driver in a full-duplex transceiver; transmitting a first signal from the first driver to a first pad according to the digital signal; transmitting the first signal from the first pad to a communication channel between the full-duplex transceiver and a counterpart full-duplex transceiver via first components in the full-duplex transceiver; transmitting a second signal from the second driver to a second pad according to the digital signal; transmitting the second signal from the second pad to a termination in the full-duplex transceiver; and generating a difference signal representing a voltage difference between the first pad and the second pad by an echo cancellation circuit.

13 . The method of claim 12 , wherein the first components comprise conductive element between the first pad and a first pin of an integrated circuit package in the full-duplex transceiver, and wherein the second components comprise conductive element between the second pad and the second pin of the integrated circuit package.

14 . The method of claim 13 , wherein the first components further comprise (i) a first printed circuit board (PCB) trace, (ii) first passive circuit elements connected to the first PCB trace and (iii) a connector between the first passive circuit elements and the communication channel, wherein the second components further comprise (i) a second printed circuit board (PCB) trace and (ii) second passive circuit elements between the second PCB trace and the termination.

15 . The method of claim 14 , wherein a transmission line parameter and a RLC parameter of a signal path comprising (i) the first components, (ii) the communication channel and (iii) third components in the counterpart full-duplex transceiver match a transmission line parameter and a RLC parameter of the second components, the third components placed between the communication channel and a third driver in the counterpart full-duplex transceiver corresponding to the first driver.

16 . The method of claim 12 , further comprising:
compensating for attenuation of a receiving signal included in the difference signal by an equalizer; and providing a compensated version of the receiving signal from the equalizer to a data output circuit.

17 . The method of claim 16 , wherein the data input circuit comprises a serializer and the data output circuit comprises a de-serializer.

18 . The method of claim 12 , wherein each of the first driver and the second driver include differential outputs.

19 . A non-transitory computer readable storage medium storing digital representation of an integrated circuit for a full-duplex transceiver, the integrated circuit comprising:
a first driver coupled to a data input circuit to receive a digital signal and generate a first signal to a first pad according to the received digital signal, the first pad coupled to a communication channel between the full-duplex transceiver and a counterpart full-duplex transceiver; a second driver coupled to the data input circuit to receive the digital signal and generate a second signal corresponding to the first signal to a second pad according to the digital signal received from the data input, the second pad coupled to a termination in the full-duplex transceiver; and an echo cancelation circuit having an output, a first input coupled to the first pad, and a second input coupl

Assignees

• Lattice Semiconductor Corp

Inventors

• Ke Jiandong
• Lei Kai
• Gao Yi
• Zhou Qi
• Wu Qiming
• Zhou Kai

Classifications

• H04B3/23 Primary

  using a replica of transmitted signal in the time domain, e.g. echo cancellers · CPC title

• H04B1/0475 Primary

  with means for limiting noise, interference or distortion (H04B1/0483 takes precedence) · CPC title

• H04B1/40

  Circuits · CPC title

• H04L5/14

  Two-way operation using the same type of signal, i.e. duplex · CPC title