Multi-Level Inverters Using Sequenced Drive of Double-Base Bidirectional Bipolar Transistors

Patent metadata

Field	Value
Publication number	US-2016285388-A1
Application number	US-201615004872-A
Country	US
Kind code	A1
Filing date	Jan 22, 2016
Priority date	Jun 24, 2013
Publication date	Sep 29, 2016
Grant date	—

Abstract

Power is inverted using double-base-contact bidirectional bipolar transistors in a three-level-inverter topology. The transistors not only switch to synthesize a PWM approximation of the desired AC waveform, but also have transient phases of diode conduction before each full turn-on or turn-off.

First claim

1 . A method of inverting power, comprising the actions of:
a) providing a neutral line, and hot lines which are respectively positive and negative with reference to the neutral line; and b) operating bidirectional dual-base-contact transistors to selectably connect each output line to the neutral line or to one of the hot lines, to thereby synthesize an AC waveform on each output line; wherein step b operates the transistors as diodes before full turn-on and before full turn-off, and also flows base current, at full turn-on, to lower the voltage on each said transistor.

2 . The method of claim 1 , wherein the providing step generates the neutral line from two of the hot lines.

3 . The method of claim 1 , wherein step b flows base current, at turn-on, through the base contact which is nearest the collector side of the device.

4 . The method of claim 1 , wherein each of the transistors is npn.

5 . The method of claim 1 , wherein each of the transistors is built in silicon carbide.

6 . The method of claim 1 , wherein each of the transistors is a three-layer four-terminal device.

7 . A power inverter, comprising:
a neutral line, and hot lines which are respectively positive and negative with reference to the neutral line; a plurality of output lines, and a plurality of bidirectional dual-base-contact transistors each connected between one of the output lines and one of the neutral and hot lines; and control circuitry which operates the transistors to selectably connect each output line to the neutral line or to one of the hot lines at various times, to thereby synthesize an AC waveform on each output line.

8 . The inverter of claim 7 , wherein the providing step generates the neutral line from two of the hot lines.

9 . The inverter of claim 7 , wherein each of the transistors is npn.

10 . The inverter of claim 7 , wherein each of the transistors is built in silicon carbide.

11 . The inverter of claim 7 , wherein each of the transistors is a three-layer four-terminal device.

12 . A power inverter which operates from positive, negative, and neutral lines, comprising:
a plurality of output lines, and a plurality of bidirectional dual-base-contact bipolar transistors each connected between one of the output lines and one of the positive, negative, and neutral lines; and control circuitry which operates the transistors to selectably connect each output line, at chosen times, to one of the positive, negative, and neutral lines, to thereby synthesize an AC waveform on each output line.

13 . The inverter of claim 12 , wherein the neutral line is averaged from the positive, negative, and neutral lines.

14 . The inverter of claim 12 , wherein each of the transistors is npn.

15 . The inverter of claim 12 , wherein each of the transistors is built in silicon carbide.

16 . The inverter of claim 12 , wherein each of the transistors is a three-layer four-terminal device.

17 - 22 . (canceled)

Assignees

• Ideal Power Inc

Inventors

• Alexander William C

Classifications

• H10D64/281

  Base electrodes for bipolar transistors · CPC title

• H10D64/231

  Emitter or collector electrodes for bipolar transistors · CPC title

• H10D62/402

  Amorphous materials · CPC title

• H10D62/137

  Collector regions of BJTs · CPC title

• H10D62/136

  of heterojunction BJTs  (vertical heterojunction BJTs having one or more non-monocrystalline Group IV elements H10D10/861) · CPC title