Power amplifier and phase correction method therefor

Patent metadata

Field	Value
Publication number	US-2016268973-A1
Application number	US-201614992490-A
Country	US
Kind code	A1
Filing date	Jan 11, 2016
Priority date	Mar 12, 2015
Publication date	Sep 15, 2016
Grant date	—

Abstract

A power amplifier apparatus may include an amplifier configured to amplify an input signal and a delay transferring circuit connected between an input terminal and an output terminal of the amplifier, the delay transferring circuit configured to delay the input signal to transfer the delayed input signal to the output terminal of the amplifier.

First claim

What is claimed is:

1 . A power amplifier apparatus comprising:
an amplifier configured to amplify an input signal; and a delay transferring circuit connected between an input terminal and an output terminal of the amplifier, the delay transferring circuit configured to delay the input signal to transfer the delayed input signal to the output terminal of the amplifier.

2 . The power amplifier apparatus of claim 1 , wherein the delay transferring circuit is configured to delay the input signal such that an offset ratio of a secondary harmonic component of the signal amplified by the amplifier is higher than an offset ratio of a fundamental wave component of the signal amplified by the amplifier.

3 . The power amplifier apparatus of claim 1 , wherein the delay transferring circuit comprises a transistor having two terminals connected to the input terminal of the amplifier and one terminal connected to the output terminal of the amplifier to transfer a harmonic signal component of the input signal to the output terminal of the amplifier from the input terminal of the amplifier.

4 . The power amplifier apparatus of claim 1 , wherein the delay transferring circuit comprises a resistor connected between the input terminal and the output terminal of the amplifier and having a resistance level determined based on a delay component between the input terminal and the output terminal of the amplifier.

5 . The power amplifier apparatus of claim 1 , wherein the delay transferring circuit comprises a capacitor connected between the input terminal and the output terminal of the amplifier and having capacitance determined based on a resistance level between the input terminal and the output terminal of the amplifier.

6 . The power amplifier apparatus of claim 5 , further comprising:
a first matching network matching impedance of the input terminal of the amplifier; and a second matching network matching impedance of the output terminal of the amplifier, wherein the capacitance of the capacitor is adaptively established based on the impedance of at least one of the first matching network or the second matching network, or combinations thereof.

7 . The power amplifier apparatus of claim 1 , wherein the delay transferring circuit is configured to delay the input signal such that a time difference between a delay time of a fundamental wave component of the input signal is different from a delay time of a secondary harmonic component of the input signal.

8 . A power amplifier apparatus comprising:
an amplifier configured to amplify an input signal; and a harmonic wave transferring circuit connected between an input terminal and an output terminal of the amplifier and configured to transfer a harmonic component of the input signal to the output terminal of the amplifier.

9 . The power amplifier apparatus of claim 8 , wherein the harmonic wave transferring circuit has impedance adaptively established such that a transfer ratio of a secondary harmonic wave of the input signal is higher than a transfer ratio of a fundamental wave of the input signal when the input signal is transferred to the output terminal of the amplifier.

10 . The power amplifier apparatus of claim 8 , further comprising:
a diode connected between the input terminal and the output terminal of the amplifier and transferring the input signal of the amplifier to the output terminal from the input terminal of the amplifier.

11 . A method for reducing distortion in an amplified signal comprising:
providing an input signal to an amplifier to generate an amplified signal; adaptively generating interference between at least a portion of the amplified signal and at least a portion of the input signal to reduce distortion in a mixed output signal including at least a portion of both the input signal and the amplified signal.

12 . The method of claim 11 , further comprising detecting an operational parameter of at least one of the input signal, the amplified signal, or the output signal, or combinations thereof.

13 . The method of claim 12 , wherein the adaptively generating interference is performed responsive to the detection of the operational parameter.

14 . The method of claim 13 , wherein the mixing of the input signal and the amplified signal is performed via a feed-forward path substantially omitting amplification of the input signal.

15 . The method of claim 14 , wherein at least one of the input signal and the amplified signal, or combinations thereof, are selectively delayed.

16 . The method of claim 13 , wherein at least one harmonic frequency of the input signal is mixed with a portion of the amplified signal in constructive manner to correct phase of the amplified signal via a feedforward path substantially omitting amplification of the input signal.

17 . The method of claim 11 , wherein the adaptively generating interference comprises delaying the input signal such that an offset ratio of a secondary harmonic component of the amplified signal is higher than an offset ratio of a fundamental wave component of the amplified signal.

18 . The method of claim 11 , wherein the adaptively generating interference comprises selectively mixing a harmonic signal component of the input signal with the amplified signal to form the output signal.

19 . The method of claim 11 , wherein the adaptively generating interference comprises delaying the input signal such that a time difference between a delay time of a fundamental wave component of the input signal is different from a delay time of a secondary harmonic component of the input signal.

20 . The method of claim 11 wherein an impedance is adaptively established such that a transfer ratio of a secondary harmonic wave of the input signal is higher than a transfer ratio of a fundamental wave of the input signal when the input signal is mixed with the amplified signal to form the output signal.

Assignees

• Samsung Electro Mech

Inventors

• Kim Gyu Suck

Classifications

• H03F1/0205 Primary

  in transistor amplifiers · CPC title

• H03F3/19

  with semiconductor devices only · CPC title

• H03F2200/451

  the amplifier being a radio frequency amplifier · CPC title

• H03F3/21

  with semiconductor devices only {(H03F3/245 takes precedence)} · CPC title

• H03F1/56

  Modifications of input or output impedances, not otherwise provided for · CPC title