History Buffer with Hybrid Entry Support for Multiple-Field Registers

Patent metadata

Field	Value
Publication number	US-2016253180-A1
Application number	US-201514632406-A
Country	US
Kind code	A1
Filing date	Feb 26, 2015
Priority date	Feb 26, 2015
Publication date	Sep 1, 2016
Grant date	—

Abstract

An approach is provided in which a mapper control unit receives dispatch information corresponding to an instruction that targets a first field in a first register and a second field in a second register, the first register being a first register type and the second register being a second register type. As such, the mapper control unit selects a history buffer entry in a history buffer that is adapted to concurrently store content corresponding to the first register type and the second register type. In turn, the mapper control unit stores first content from the first register's targeted first fields and second content from the second register's targeted second fields into the selected history buffer entry.

First claim

1 . A method implemented by an information handling system that includes a memory and a processor, the method comprising:
receiving dispatch information corresponding to an instruction that targets at least one first field in a first register and at least one second field in a second register, wherein the first register is a first register type and the second register is a second register type; selecting a history buffer entry from a plurality of history buffer entries included in a history buffer, wherein the selected history buffer entry is adapted to concurrently store content corresponding to the first register type and the second register type; and storing, in the selected history buffer entry, first content from the first register's targeted first fields and second content from the second register's targeted second fields.

2 . The method of claim 1 wherein the targeted first fields correspond to a first data width that is different than a second data width corresponding to the targeted second fields.

3 . The method of claim 1 further comprising:
storing a hybrid type indicator in an indicator field included in the selected history buffer entry, wherein the hybrid type indicator indicates that the selected history buffer entry stores both the first content and the second content.

4 . The method of claim 1 further comprising:
dynamically configuring the history buffer entry to support the first register type and the second register type in response to determining that the dispatch information indicates that the first register and second register are targeted by the instruction.

5 . The method of claim 1 wherein, prior to receiving the dispatch information, the method further comprises:
generating a history buffer field assignment in response to determining that the instruction leaves at least one field in the first field untargeted, wherein the history buffer field assignment allocates the at least one second field from the second register to a location in the selected history buffer entry corresponding to the untargeted first field in the first register.

6 . The method of claim 5 wherein, prior to receiving the dispatch information, the method further comprises:
comparing a plurality of different instructions to the history buffer field assignment;
determining that at a selected one of the plurality of different instructions violate the history buffer assignment; and
separating the selected different instruction into a first different instruction and a second different instruction, wherein both the first different instruction and second different instruction adhere to the history buffer assignment.

7 . The method of claim 1 wherein the selected history buffer entry includes a single etag field and a plurality of field sets that each include an itag field.

8 . An information handling system comprising:
one or more processors; a memory coupled to at least one of the processors; and a set of computer program instructions stored in the memory and executed by at least one of the processors in order to perform actions of:
receiving dispatch information corresponding to an instruction that targets at least one first field in a first register and at least one second field in a second register, wherein the first register is a first register type and the second register is a second register type;
selecting a history buffer entry from a plurality of history buffer entries included in a history buffer, wherein the selected history buffer entry is adapted to concurrently store content corresponding to the first register type and the second register type; and
storing, in the selected history buffer entry, first content from the first register's targeted first fields and second content from the second register's targeted second fields.

9 . The information handling system of claim 8 wherein the targeted first fields correspond to a first data width that is different than a second data width corresponding to the targeted second fields.

10 . The information handling system of claim 8 wherein the one or more processors perform additional actions comprising:
storing a hybrid type indicator in an indicator field included in the selected history buffer entry, wherein the hybrid type indicator indicates that the selected history buffer entry stores both the first content and the second content.

11 . The information handling system of claim 8 wherein the one or more processors perform additional actions comprising:
dynamically configuring the history buffer entry to support the first register type and the second register type in response to determining that the dispatch information indicates that the first register and second register are targeted by the instruction.

12 . The information handling system of claim 8 wherein, prior to receiving the dispatch information, the one or more processors perform additional actions comprising:
generating a history buffer field assignment in response to determining that the instruction leaves at least one field in the first field untargeted, wherein the history buffer field assignment allocates the at least one second field from the second register to a location in the selected history buffer entry corresponding to the untargeted first field in the first register.

13 . The information handling system of claim 12 wherein, prior to receiving the dispatch information, the one or more processors perform additional actions comprising:
comparing a plurality of different instructions to the history buffer field assignment;
determining that at a selected one of the plurality of different instructions violate the history buffer assignment; and
separating the selected different instruction into a first different instruction and a second different instruction, wherein both the first different instruction and second different instruction adhere to the history buffer assignment.

14 . The information handling system of claim 8 wherein the selected history buffer entry includes a single etag field and a plurality of field sets that each include an itag field.

15 . A computer program product stored in a computer readable storage medium, comprising computer program code that, when executed by an information handling system, causes the information handling system to perform actions comprising:
receiving dispatch information corresponding to an instruction that targets at least one first field in a first register and at least one second field in a second register, wherein the first register is a first register type and the second register is a second register type; selecting a history buffer entry from a plurality of history buffer entries included in a history buffer, wherein the selected history buffer entry is adapted to concurrently store content corresponding to the first register type and the second register type; and storing, in the selected history buffer entry, first content from the first register's targeted first fields and second content from the second register's targeted second fields.

16 . The computer program product of claim 15 wherein the targeted first fields correspond to a first data width that is different than a second data width corresponding to the targeted second fields.

17 . The computer program product of claim 15 wherein the information handling system performs additional actions comprising:
storing a hybrid type indicator in an indicator field included in the selected history buffer entry, wherein the hybrid type indicator indicates that the selected history buffer entry stores both the

Assignees

• IBM

Inventors

• Genden Michael J
• Nguyen Dung Q

Classifications

• G06F9/3012

  Organisation of register space, e.g. banked or distributed register file · CPC title

• G06F9/3013 Primary

  according to data content, e.g. floating-point registers, address registers · CPC title

• G06F9/3863

  using multiple copies of the architectural state, e.g. shadow registers · CPC title

• G06F9/30105

  Register structure · CPC title

• G06F9/462

  with multiple register sets · CPC title