Structure and formation method of finfet device

Patent metadata

Field	Value
Publication number	US-2016240651-A1
Application number	US-201514622180-A
Country	US
Kind code	A1
Filing date	Feb 13, 2015
Priority date	Feb 13, 2015
Publication date	Aug 18, 2016
Grant date	—

Abstract

Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a semiconductor substrate and a fin structure over the semiconductor substrate. The semiconductor device structure also includes a gate stack over a portion of the fin structure, and the fin structure includes an intermediate portion under the gate stack and upper portions besides the intermediate portion. The semiconductor device structure further includes a contact layer over the fin structure. The contact layer includes a metal material, and the upper portions of the fin structure also include the metal material.

First claim

1 . A semiconductor device structure, comprising:
a semiconductor substrate; a fin structure over the semiconductor substrate; a gate stack over a portion of the fin structure, wherein the fin structure includes an intermediate portion under the gate stack and upper portions besides the intermediate portion; and a contact layer over the fin structure, wherein the contact layer comprises a metal material, and the upper portions of the fin structure also comprise the metal material, and wherein the contact layer extends along the gate stack without protruding from a top surface of the gate stack.

2 . The semiconductor device structure as claimed in claim 1 , wherein the metal material comprises tin, lead, or a combination thereof.

3 . The semiconductor device structure as claimed in claim 1 , wherein a concentration of the metal material in each of the upper portions gradually decreases along a direction away from an interface between the fin structure and the contact layer.

4 . The semiconductor device structure as claimed in claim 1 , wherein the fin structure comprises germanium.

5 . The semiconductor device structure as claimed in claim 4 , wherein the contact layer further comprises germanium.

6 . The semiconductor device structure as claimed in claim 5 , wherein a concentration of germanium in the contact layer gradually decreases along a direction away from an interface between the fin structure and the contact layer.

7 . The semiconductor device structure as claimed in claim 1 , further comprising a carbon-containing layer between the semiconductor substrate and the fin structure, wherein the carbon-containing layer surrounds a lower portion of the fin structure, and the lower portion is below the upper portions and the intermediate portion.

8 . The semiconductor device structure as claimed in claim 7 , wherein the lower portion of the fin structure further comprises carbon.

9 . The semiconductor device structure as claimed in claim 8 , wherein a concentration of carbon in the lower portion gradually decreases along a direction away from an interface between the fin structure and the carbon-containing layer.

10 . The semiconductor device structure as claimed in claim 1 , further comprising a semiconductor blocking layer between the intermediate portion of the fin structure and the gate stack.

11 . A semiconductor device structure, comprising:
a semiconductor substrate; a germanium-containing fin structure over the semiconductor substrate; a metal gate stack over a portion of the germanium-containing fin structure; and a semiconductor blocking layer between the germanium-containing fin structure and the metal gate stack.

12 . The semiconductor device structure as claimed in claim 11 , further comprising a contact layer over the fin structure, wherein the contact layer comprises a metal material, and a portion of the fin structure under the contact layer also comprises the metal material.

13 . The semiconductor device structure as claimed in claim 12 , wherein the metal material comprises tin, lead, or a combination thereof.

14 . The semiconductor device structure as claimed in claim 13 , further comprising a carbon-containing layer between the semiconductor substrate and the germanium-containing fin structure, wherein the carbon-containing layer surrounds a lower portion of the fin structure.

15 . The semiconductor device structure as claimed in claim 14 , further comprising:
a dielectric layer over the contact layer; and a conductive contact in the dielectric layer and is in electrical contact with the contact layer.

16 . A method for forming a semiconductor device structure, comprising:
forming a fin structure over a semiconductor substrate; forming a gate stack over the fin structure; forming a contact layer over a portion of the fin structure, wherein the contact layer comprises a metal material, and the contact layer extends along the gate stack without protruding from a top surface of the gate stack; and driving a portion of the metal material from the contact layer into the fin structure.

17 . The method for forming a semiconductor device structure as claimed in claim 16 , further comprising forming a carbon-containing layer over the semiconductor substrate before the fin structure is formed, wherein the carbon-containing layer surrounds a lower portion of the fin structure after the fin structure is formed.

18 . The method for forming a semiconductor device structure as claimed in claim 16 , wherein the portion of the metal material is driven into the fin structure using a thermal operation.

19 . The method for forming a semiconductor device structure as claimed in claim 16 , further comprising forming a semiconductor blocking layer over the fin structure before the gate stack is formed.

20 . The method for forming a semiconductor device structure as claimed in claim 19 , further comprising:
oxidizing a portion of the semiconductor blocking layer not covered by the gate stack; and removing the oxidized portion of the semiconductor blocking layer before the contact layer is formed.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• LEE Kai-Hsuan
• Yang Cheng-Yu
• Shen Hsiang-Ku
• Tsai Han-Ting
• Huang Yimin

Classifications

• H10P50/242

  of Group IV materials · CPC title

• H10P14/6304

  Formation by oxidation, e.g. oxidation of the substrate · CPC title

• H10W10/17

  formed using trench refilling with dielectric materials, e.g. shallow trench isolations · CPC title

• H10W10/014

  using trench refilling with dielectric materials, e.g. shallow trench isolations · CPC title

• H10D62/822

  comprising only Group IV materials heterojunctions, e.g. Si/Ge heterojunctions · CPC title