COG Dielectric Composition For Use With Nickel Electrodes

Patent metadata

Field	Value
Publication number	US-2016240313-A1
Application number	US-201415024166-A
Country	US
Kind code	A1
Filing date	Sep 8, 2014
Priority date	Oct 30, 2013
Publication date	Aug 18, 2016
Grant date	—

Abstract

Multilayer ceramic chip capacitors which satisfy COG requirements and which are compatible with reducing atmosphere sintering conditions so that non-noble metals such as nickel and nickel alloys may be used for internal and external electrodes are disclosed. The capacitors exhibit desirable dielectric properties (high capacitance, low dissipation factor, high insulation resistance), excellent performance on highly accelerated life testing, and very good resistance to dielectric breakdown. The dielectric layers comprise a strontium zirconate matrix doped with other metal oxides such as TiO 2 , MgO, B 2 O 3 , CaO, MnO, Nd2O3 and Nb2O5 in various combinations.

First claim

1 : A composition comprising a mixture of precursor materials that, upon firing, forms a dielectric material comprising a strontium-zirconate matrix doped with at least niobium, boron and magnesium.

2 : The composition according to claim 1 , wherein the dielectric material exhibits a dielectric constant greater than 31.

3 : The composition according to claim 1 , wherein the mixture further comprises precursor materials such that, upon firing, result in the dielectric material further comprising one or more dopants selected from the group consisting of titanium, calcium, neodymium, and manganese.

4 : A lead-free and cadmium-free dielectric material comprising a solids portion wherein the solids portion comprises, prior to firing:
from about 38.3 wt % to about 44.2 wt % SrO; from about 41.6 wt % to about 50.0 wt % ZrO 2 ; optionally up to about 4.8 wt % TiO 2 ; optionally up to about 3.2 wt % CaO; from about 6.4 wt % to about 7.6 wt % Nb 2 O 5 ; optionally up to about 4.1 wt % Nd 2 O 3 ; from about 0.27 wt % to about 0.38 wt % B 2 O 3 ; from about 0.31 wt % to about 0.44 wt % MgO; and optionally up to about 0.06 wt % MnO.

5 : A method of forming an electronic component comprising:
applying the dielectric material of claim 4 to a substrate; and firing the substrate at a temperature sufficient to sinter the dielectric material.

6 : The method of claim 5 , wherein the firing is conducted at a temperature of from about 1200° C. to about 1350° C.

7 : The method of claim 5 , wherein the firing is conducted in an atmosphere having a partial oxygen pressure of about 10 −12 atm to about 10 −8 atm.

8 : A multilayer ceramic chip capacitor comprising a fired collection of:
alternately stacked layers of:
the dielectric material of claim 4 ; and
layers of an internal electrode material comprising a transition metal other than Ag, Au, Pd, or Pt.

9 : The multilayer ceramic chip capacitor of claim 8 , wherein the internal electrode material comprises nickel.

10 : A method of forming an electronic component comprising:
alternately applying layers of
the dielectric material of claim 4 , and
a metal-containing electrode paste
onto a substrate to form a laminar stack;
firing the substrate at a temperature sufficient to sinter the dielectric material; cutting the laminar stack to a predetermined shape; separating the cut stack from the substrate; and firing the stack to sinter the metal in the electrode paste and fuse the oxides in the dielectric material, wherein the electrode layers and the dielectric material layers each have layer thicknesses.

11 : The method of claim 10 , wherein the layers of dielectric material, after firing, each have a thickness of about 1 microns to about 50 microns.

12 : The method of claim 10 , wherein the firing is conducted at a temperature of from about 1200° C. to about 1325° C.

13 : The method of claim 10 , wherein the firing is conducted in an atmosphere having a partial oxygen pressure of about 10 −12 atm to about 10 −8 atm.

14 : The method of claim 10 , wherein the metal-containing electrode paste comprises nickel.

16 : A lead-free and cadmium-free dielectric material comprising a solids portion wherein the solids portion comprises, prior to firing:
from about 54.6 wt % to about 63.0 wt % SrCO 3 ; from about 41.6 wt % to about 50.0 wt % ZrO 2 ; optionally up to about 4.8 wt % TiO 2 ; optionally up to about 5.7 wt % CaCO 3 ; from about 6.4 wt % to about 7.6 wt % Nb 2 O 5 ; optionally up to about 4.1 wt % Nd 2 O 3 ; from about 0.27 wt % to about 0.38 wt % B 2 O 3 ; from about 0.31 wt % to about 0.44 wt % MgO; and optionally up to about 0.06 wt % MnO.

16 : A method of forming an electronic component comprising:
applying the dielectric material of claim 15 to a substrate; and firing the substrate at a temperature sufficient to sinter the dielectric material.

17 : The method of claim 16 , wherein the firing is conducted at a temperature of from about 1200° C. to about 1350° C.

18 : The method of claim 16 , wherein the firing is conducted in an atmosphere having a partial oxygen pressure of about 10 −12 atm to about 10 −8 atm.

19 : A multilayer ceramic chip capacitor comprising a fired collection of:
alternately stacked layers of:
the dielectric material of claim 15 ; and
layers of an internal electrode material comprising a transition metal other than Ag, Au, Pd, or Pt.

20 : The multilayer ceramic chip capacitor of claim 19 , wherein the internal electrode material comprises nickel.

21 : A method of forming an electronic component comprising:
alternately applying layers of
the dielectric material comprising of claim 15 , and
a metal-containing electrode paste
onto a substrate to form a laminar stack;
firing the substrate at a temperature sufficient to sinter the dielectric material; cutting the laminar stack to a predetermined shape; separating the cut stack from the substrate; and firing the stack to sinter the metal in the electrode paste and fuse the oxides in the dielectric material, wherein the electrode layers and the dielectric material layers each have layer thicknesses.

22 : The method of claim 21 , wherein the layers of dielectric material, after firing, each have a thickness of about 1 microns to about 50 microns.

23 : The method of claim 21 , wherein the firing is conducted at a temperature of from about 1200° C. to about 1325° C.

24 : The method of claim 21 , wherein the firing is conducted in an atmosphere having a partial oxygen pressure of about 10 −12 atm to about 10 −8 atm.

25 : The method of claim 21 , wherein the metal-containing electrode paste comprises nickel.

26 : A lead-free and cadmium-free dielectric material comprising a solids portion wherein the solids portion comprises, prior to firing:
optionally up to about 1.3 SrTiO 3 ; from about 70.8 wt % to about 81.7 wt % SrZrO 3 ; optionally up to about 3.4 wt % CaZrO 3 ; optionally up to about 7.6 wt % CaTiO 3 ; from about 11.6 wt % to about 13.5 wt % Sr 2 Nb 2 O 7 ; optionally up to about 7.1 wt % Nd 2 ZrO 5 ; from about 0.27 wt % to about 0.38 wt % B 2 O 3 ; from about 0.31 wt % to about 0.44 wt % MgO; and optionally up to about 0.06 wt % MnO.

27 : A method of forming an electronic component comprising:
applying the dielectric material of claim 26 to a substrate; and firing the substrate at a temperature sufficient to sinter the dielectric material.

28 : The method of claim 27 , wherein the firing is conducted at a temperature of from about 1200° C. to about 1350° C.

29 : The method of claim 27 , wherein the firing is conducted in an atmosphere having a partial oxygen pressure of about 10 −12 atm to about 10 −8 atm.

30 : A multilayer ceramic chip capacitor comprising a fired collection of:
alternately stacked layers of:
the dielectric material of claim 26 ; and
layers of an internal electrode material comprising a transition metal other than Ag, Au, Pd, or Pt.

31 : The multilayer ceramic chip capacitor of claim 30 , wherein the internal electrode material comprises nickel.

32 : A method of forming an electronic component comprising:
alternately applying layers of
the dielectric material of claim 26 , and
a metal-containing

Assignees

• Ferro Corp

Inventors

• Symes Jr Walter J

Classifications

• H01G4/01

  Form of self-supporting electrodes · CPC title

• C04B35/491

  based on lead zirconates and lead titanates {, e.g. PZT} · CPC title

• H01G4/30

  Stacked capacitors (H01G4/33 takes precedence) · CPC title

• C04B2235/3236

  Alkaline earth titanates · CPC title

• H01G4/0085

  Fried electrodes · CPC title