Executing Perform Floating Point Operation Instructions

Patent metadata

Field	Value
Publication number	US-2016239266-A1
Application number	US-201615137272-A
Country	US
Kind code	A1
Filing date	Apr 25, 2016
Priority date	Oct 8, 2007
Publication date	Aug 18, 2016
Grant date	—

Abstract

A method and system are disclosed for executing a machine instruction in a central processing unit. The method comprises the steps of obtaining a perform floating-point operation instruction; obtaining a test bit; and determining a value of the test bit. If the test bit has a first value, (a) a specified floating-point operation function is performed, and (b) a condition code is set to a value determined by said specified function. If the test bit has a second value, (c) a check is made to determine if said specified function is valid and installed on the machine, (d) if said specified function is valid and installed on the machine, the condition code is set to one code value, and (e) if said specified function is either not valid or not installed on the machine, the condition code is set to a second code value.

First claim

What is claimed is:

1 . A computer implemented method for performing an instruction for converting a floating-point operand, the instruction having implied operands consisting of a first general register and a second general register, the method comprising:
executing, by a processor, the instruction, the executing comprising: (a) based on a test bit of the first general register being a first value: (1) performing a floating-point conversion function specified by a plurality of function fields of the first general register to produce a result, wherein the floating-point conversion function specified is one of a plurality of specifiable floating-point conversion functions, wherein the processor is configured to execute installed floating-point conversion functions of the plurality of specifiable floating-point conversion functions; and (2) storing the result in the second general register and setting a condition code, the condition code indicating whether the performing the floating-point conversion function specified encountered an exceptional condition; and (b) based on the test bit of the first general register being a second value: (1) determining whether the floating-point conversion function specified by the plurality of function fields of the first general register is an installed specifiable floating-point conversion function; (2) setting a condition code without storing a result, the condition code indicating whether the floating-point conversion function specified is an installed specifiable floating-point conversion function; and (3) setting a return code in the second general register.

2 . The method of claim 1 , wherein a first value of the condition code indicates that the function specified is installed and a second value of the condition code value indicates that the function specified is invalid or not installed.

3 . A computer program product for performing an instruction for converting a floating-point operand, the instruction having implied operands consisting of a first general register and a second general register, comprising at least one non-transitory computer usable storage medium having computer readable program code logic tangibly embodied therein for execution by a computer for performing a method comprising:
executing, by a processor, the instruction, the executing comprising: (a) based on a test bit of the first general register being a first value: (1) performing a floating-point conversion function specified by a plurality of function fields of the first general register to produce a result, wherein the floating-point conversion function specified is one of a plurality of specifiable floating-point conversion functions, wherein the processor is configured to execute installed floating-point conversion functions of the plurality of specifiable floating-point conversion functions; and (2) storing the result in the second general register and setting a condition code, the condition code indicating whether the performing the floating-point conversion function specified encountered an exceptional condition; and (b) based on the test bit of the first general register being a second value: (1) determining whether the floating-point conversion function specified by the plurality of function fields of the first general register is an installed specifiable floating-point conversion function; (2) setting a condition code without storing a result, the condition code indicating whether the floating-point conversion function specified is an installed specifiable floating-point conversion function; and (3) setting a return code in the second general register.

4 . The computer program product of claim 3 , wherein a first value of the condition code indicates that the function specified is installed and a second value of the condition code value indicates that the function specified is invalid or not installed.

5 . A system for performing an instruction for converting a floating-point operand, the instruction having implied operands consisting of a first general register and a second general register, the system comprising a memory and a processor connected to the memory, the system being configured to perform a method comprising:
executing, by a processor, the instruction, the executing comprising: (a) based on a test bit of the first general register being a first value: (1) performing a floating-point conversion function specified by a plurality of function fields of the first general register to produce a result, wherein the floating-point conversion function specified is one of a plurality of specifiable floating-point conversion functions, wherein the processor is configured to execute installed floating-point conversion functions of the plurality of specifiable floating-point conversion functions; and (2) storing the result in the second general register and setting a condition code, the condition code indicating whether the performing the floating-point conversion function specified encountered an exceptional condition; (b) based on the test bit of the first general register being a second value: (1) determining whether the floating-point conversion function specified by the plurality of function fields of the first general register is an installed specifiable floating-point conversion function; (2) setting a condition code without storing a result, the condition code indicating whether the floating-point conversion function specified is an installed specifiable floating-point conversion function; and (3) setting a return code in the second general register.

6 . The system of claim 5 , wherein a first value of the condition code indicates that the function specified is installed and a second value of the condition code value indicates that the function specified is invalid or not installed.

Assignees

• IBM

Inventors

• Hack Michael H T
• Smith Sr Ronald M

Classifications

• G06F7/483 Primary

  Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers {(G06F7/4806, G06F7/4824, G06F7/49, G06F7/491, G06F7/544 take precedence)} · CPC title

• G06F9/30181

  Instruction operation extension or modification · CPC title

• G06F9/30014

  with variable precision · CPC title

• G06F7/4991

  Overflow or underflow · CPC title

• G06F9/30094 Primary

  Condition code generation, e.g. Carry, Zero flag · CPC title