Semiconductor device with at least one truncated corner and/or side cut-out

Patent metadata

Field	Value
Publication number	US-2016211219-A1
Application number	US-201614991035-A
Country	US
Kind code	A1
Filing date	Jan 8, 2016
Priority date	Jan 17, 2015
Publication date	Jul 21, 2016
Grant date	—

Abstract

A method of producing a substantially rectangular semiconductor device having at least one corner truncation or corner cut-out or side cut-out, comprises: a) providing a semiconductor substrate; b) making at least one opening through the substrate by means of etching; and c) cutting the substrate along a first pair of parallel lines, and along a second pair of parallel lines perpendicular to the first pair. At least one line of the first/second pair passes through said opening. Two lines may pass through said opening. More than one opening may be provided for said device. The opening may be located at a corner or on a side of the otherwise rectangular device. The etching may be any combination of existing isotropic/anisotropic front/back etching techniques.

First claim

1 . A method of producing a substantially rectangular semiconductor device having at least one corner truncation and/or at least one corner cut-outs and/or at least one side cut-out, comprising the steps of:
a) providing a semiconductor substrate; b) making at least one opening through the semiconductor substrate by means of etching; c) cutting the substrate along at least a first pair of parallel lines, and along a second pair of parallel lines perpendicular to the first pair, wherein at least one line of the first pair and/or the second pair passes through said opening.

2 . The method according to claim 1 ,
wherein in step c) the at least one opening is passed by at least one line of the first pair, and also by at least one line of the second pair.

3 . The method according to claim 1 ,
wherein step b) comprises making at least two openings through the semiconductor substrate by means of etching; and wherein in step c) each opening is passed by at least one line of the first and/or second pair.

4 . The method according to claim 1 ,
wherein step b) comprises making at least three openings through the semiconductor substrate by means of etching; and wherein in step c) each opening is passed by at least one line of the first and/or second pair.

5 . The method according to claim 1 ,
wherein step b) comprises making at least four openings through the semiconductor substrate by means of etching; and wherein in step c) each opening is passed by one line of the first pair and by one line of the second pair.

6 . The method according to claim 1 , wherein the at least one opening has a substantially triangular or rectangular or square or circular cross-section in a plane parallel to the substrate.

7 . The method according to claim 6 , wherein the opening has a substantially square shape, and wherein the sides of said square cross-section are substantially parallel to the lines of step c.

8 . The method according to claim 6 , wherein the opening has a substantially square shape, and wherein the sides of said square cross-section have an angle of about 45° with respect to the cutting lines of step c.

9 . The method according to claim 1 , wherein step b) comprises making the at least one opening using an isotropic etching technique.

10 . The method according to claim 1 , wherein step b) comprises making the at least one opening using an anisotropic etching technique.

11 . The method according to claim 1 , wherein step b) comprises making the at least one opening by using at least two different etching steps selected from the group consisting of isotropic front etching, isotropic back etching, anisotropic front etching and anisotropic back etching.

12 . Semiconductor device having at least one corner truncation and/or at least one corner cut-out and/or at least one side cut-out, primarily formed by etching.

13 . A method of mounting, in a transistor outline package, a substantially rectangular semiconductor device having at least one corner truncation and/or at least one corner cut-out and/or at least one side cut-out, the method comprising:
a) providing a transistor outline package, having at least two elongated legs and at least two corresponding internal wire connection points; b) providing a substantially rectangular semiconductor device having at least one truncated corner and/or at least one corner cut-out and/or at least one side cut-out, made by a method according to claim 1 ; c) positioning the semiconductor device in a plane substantially perpendicular to the elongated legs of the transistor outline package, such that at least one of the wire connection points is located adjacent the at least one corner truncation and/or the at least one corner cut-out and/or the least one side cut-out.

14 . Transistor outline package comprising a semiconductor device according to claim 12 .

Assignees

• Melexis Technologies Nv

Inventors

• Buydens Luc
• Maddalena Sam
• Nedelev Petko

Classifications

• B81C1/00865

  Multistep processes for the separation of wafers into individual elements · CPC title

• H10W76/132 Primary

  having other interconnections through an insulated passage in the conductive base · CPC title

• H10P54/00 Primary

  Cutting or separating of wafers, substrates or parts of devices · CPC title

• H10D62/117

  Shapes of semiconductor bodies · CPC title

• H01L2223/54426

  Electricity · mapped topic