Method for forming anti stiction coating and anti stiction coating thereof
US-2015346391-A1 · Dec 3, 2015 · US
US2016207756A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2016207756-A1 |
| Application number | US-201514599218-A |
| Country | US |
| Kind code | A1 |
| Filing date | Jan 16, 2015 |
| Priority date | Jan 16, 2015 |
| Publication date | Jul 21, 2016 |
| Grant date | — |
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A substrate structure for a micro electro mechanical system (MEMS) device, a semiconductor structure and a method for fabricating the same are provided. In various embodiments, the substrate structure for the MEMS device includes a substrate, the MEMS device, and an anti-stiction layer. The MEMS device is over the substrate. The anti-stiction layer is on a surface of the MEMS device, and includes amorphous carbon, polytetrafluoroethene, hafnium oxide, tantalum oxide, zirconium oxide, or a combination thereof.
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1 . A substrate structure for a micro electro mechanical system (MEMS) device, comprising: a substrate; the MEMS device over the substrate; and an anti-stiction layer on a surface of the MEMS device and comprising a material selected from a group consisting of: amorphous carbon, polytetrafluoroethene, hafnium oxide, tantalum oxide, zirconium oxide, and a combination thereof. 2 . The substrate structure of claim 1 , further comprising a bond ring over the substrate. 3 . The substrate structure of claim 1 , further comprising an etch stop layer on the substrate. 4 . A semiconductor structure, comprising: a first substrate having a first portion; a second substrate substantially parallel to the first substrate, and having a second portion substantially aligned with the first portion; a MEMS device between the first portion and the second portion; a protruding structure on a surface of the second portion, the protruding structure facing toward a space enclosed by the first portion and the second portion; and an anti-stiction layer either on a surface of the MEMS device facing toward the second portion or on a surface of the second portion, or the anti-stiction layer is on both the surface of the MEMS device facing toward the second portion and on the surface of the second portion, and the anti-stiction layer comprises amorphous carbon, polytetrafluoroethene, hafnium oxide, tantalum oxide, zirconium oxide, or a combination thereof. 5 . The semiconductor structure of claim 4 , further comprising an etch stop layer on the first portion. 6 . The semiconductor structure of claim 4 , further comprising a bond ring over the first substrate. 7 . The semiconductor structure of claim 6 , further comprising a bond pad over the second substrate and bonded with the bond ring. 8 . The semiconductor structure of claim 7 , wherein the bond ring comprises a first metallic layer, the bond pad comprises a second metallic layer, and the first metallic layer and the second metallic layer are made of different materials. 9 . The semiconductor structure of claim 8 , wherein the first metallic layer is made of germanium, and the second metallic layer is made of aluminum copper. 10 . The semiconductor structure of claim 7 , wherein the bond ring comprises a first metallic layer, the bond pad comprises a second metallic layer and a third metallic layer, and the third metallic layer is sandwiched between the first metallic layer and the second metallic layer, wherein the first metallic layer and the second metallic layer are made of the same material, and the third metallic layer is made of a material different from that of the first metallic layer and the second metallic layer. 11 . The semiconductor structure of claim 10 , wherein the first metallic layer and the second metallic layer are made of aluminum copper, and the third metallic layer is made of germanium. 12 . The semiconductor structure of claim 4 , wherein at least one of the first portion and the second portion is a recess. 13 . The semiconductor structure of claim 4 , wherein the protruding structure is made of oxide, nitride, or a combination thereof. 14 . The semiconductor structure of claim 4 , wherein the anti-stiction layer is on the surface of the MEMS device facing toward the second portion, and the semiconductor structure further comprises a self-assembled monolayers coating on the second portion. 15 - 20 . (canceled) 21 . The substrate structure of claim 1 , wherein the substrate comprises an elementary semiconductor, a compound semiconductor, an alloy semiconductor, or a combination thereof. 22 . The substrate structure of claim 1 , wherein the MEMS device comprises a spring, a proof mass, an actuator, a sensor, a valve, a gear, a gyroscope, a lever, a hinge or a combination thereof. 23 . The semiconductor structure of claim 4 , wherein the first substrate or the second substrate comprises an elementary semiconductor, a compound semiconductor, an alloy semiconductor or a combination thereof. 24 . The semiconductor structure of claim 4 , wherein the first substrate or the second substrate is a semiconductor on insulator (SOI). 25 . The semiconductor structure of claim 4 , wherein the first substrate or the second substrate comprises a doped epi layer. 26 . The semiconductor structure of claim 4 , wherein the first substrate or the second substrate comprises a multilayer compound semiconductor structure.
Transfer and j oin technology, i.e. forming the electronic processing unit and the micromechanical structure on separate substrates and joining the substrates · CPC title
Anti-stiction coatings · CPC title
Depositing an anti-stiction or passivation coating, e.g. on the elastic or moving parts · CPC title
Bonding or gluing multiple substrate layers · CPC title
the micromechanical device and the control or processing electronics being integrated on the same substrate · CPC title
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