Method of making a finfet, and finfet formed by the method

Patent metadata

Field	Value
Publication number	US-2016204255-A1
Application number	US-201615076762-A
Country	US
Kind code	A1
Filing date	Mar 22, 2016
Priority date	Mar 17, 2010
Publication date	Jul 14, 2016
Grant date	—

Abstract

A method includes forming first and second fins of a finFET extending above a semiconductor substrate, with a shallow trench isolation (STI) region in between, and a distance between a top surface of the STI region and top surfaces of the first and second fins. First and second fin extensions are provided on top and side surfaces of the first and second fins above the top surface of the STI region. Material is removed from the STI region, to increase the distance between the top surface of the STI region and top surfaces of the first and second fins. A conformal stressor dielectric material is deposited over the fins and STI region. The conformal dielectric stressor material is reflowed, to flow into a space between the first and second fins above a top surface of the STI region, to apply stress to a channel of the finFET.

First claim

What is claimed is:

1 . A finFET comprising:
first and second fins extending above a semiconductor substrate, with a shallow trench isolation (STI) region therebetween having an STI dielectric material, and a distance between a topmost surface of the STI dielectric material and top surfaces of the first and second fins; a gate electrode over the first and second fins; first and second SiGe fin extensions on top and side surfaces of the first and second fins above the topmost surface of the STI dielectric material, wherein a bottommost edge of each of the first and second SiGe fin extensions is located a non-zero distance above the topmost surface of the STI dielectric material; and a dielectric stressor material in a space defined between the first and second fins above the topmost surface of the STI material, for applying stress to a channel region of the finFET.

2 . The finFET of claim 1 , wherein the a top surface of the stressor material is above a bottom of the SiGe fin extensions.

3 . The finFET of claim 1 , wherein the stressor material applies a compressive stress in a range from about 1 GPa to about 3 GPa to a contact etch stop layer over the fin extensions.

4 . The finFET of claim 3 , wherein the conformal stressor dielectric material applies a compressive stress of about 1.5 GPa to about 3 GPa to a contact etch stop layer over the fin extensions.

5 . The finFET of claim 1 , wherein the stressor material is capable of being reflowed at a temperature of 300° C.

6 . The finFET of claim 5 , wherein the stressor material is a silicon nitride.

7 . The finFET of claim 5 , wherein the stressor material is a silicon oxide.

8 . The finFET of claim 1 , further comprising sidewall spacers adjacent the gate electrode, the sidewall spacers comprising a film of the dielectric stressor material.

9 . The finFET of claim 1 , wherein the topmost surface of the STI dielectric material extends to contact a side of the first fin and a side of the second fin.

10 . The finFET of claim 1 , wherein a distance between a top surface of the dielectric stressor material and a bottom of the SiGe fin extensions on side surfaces of the first and second fins is in a range from 5 nm to 15 nm.

11 . A finFET comprising:
first and second fins extending above a semiconductor substrate, with a shallow trench isolation (STI) region therebetween having an STI dielectric material, and a distance between a topmost surface of the STI dielectric material and top surfaces of the first and second fins; a gate electrode over the first and second fins; first and second epitaxial fin extensions on top and side surfaces of the first and second fins above the topmost surface of the STI dielectric material, wherein a bottommost edge of each of the first and second epitaxial fin extensions is located a non-zero distance above the topmost surface of the STI dielectric material; and a source or drain region having a dielectric stressor material in a space defined between the first and second fins above the topmost surface of the STI material and above a bottom of the epitaxial fin extensions, for applying stress to a channel region of the finFET.

12 . The finFET of claim 11 , wherein the conformal stressor dielectric material applies a compressive stress of about 1.5 GPa to about 3 GPa to a contact etch stop layer over the fin extensions. 13 , The finFET of claim 11 , wherein the stressor material is capable of being reflowed at a temperature of 300° C.

14 . The finFET of claim 11 , wherein the topmost surface of the STI dielectric material extends to contact a side of the first fin and a side of the second fin.

15 . The finFET of claim 11 , wherein a distance between a top surface of the dielectric stressor material and a bottom of the epitaxial fin extensions on side surfaces of the first and second fins is in a range from 5 nm to 15 nm.

16 . A finFET comprising:
first and second fins extending above a semiconductor substrate, with a shallow trench isolation (STI) region therebetween having an STI dielectric material, and a distance between a topmost surface of the STI dielectric material and top surfaces of the first and second fins; a gate electrode over the first and second fins; first and second epitaxial fin extensions on top and side surfaces of the first and second fins above the topmost surface of the STI dielectric material, wherein a bottommost edge of each of the first and second epitaxial fin extensions is located a non-zero distance above the topmost surface of the STI dielectric material; and a source or drain region having a reflowable dielectric stressor material in a space defined between the first and second fins above the topmost surface of the STI material and above a bottom of the epitaxial fin extensions, for applying stress to a channel region of the finFET; and sidewall spacers adjacent the gate electrode, the sidewall spacers comprising a film of the reflowable dielectric stressor material.

17 . The finFET of claim 16 , wherein the reflowable dielectric stressor material is one of the group consisting of a silicon nitride or a silicon oxide.

18 . The finFET of claim 16 , wherein the epitaxial fin extensions comprise SiGe.

19 . The finFET of claim 16 , wherein the topmost surface of the STI dielectric material extends to contact a side of the first fin and a side of the second fin.

20 . The finFET of claim 16 , wherein a distance between a top surface of the dielectric stressor material and a bottom of the SiGe fin extensions on side surfaces of the first and second fins is in a range from 5 nm to 15 nm.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Lin Chia-Pin
• Chan Chien-Tai
• Lin Hsien-Chin
• Lin Shyue-Shyh

Classifications

• H10D30/62

  Fin field-effect transistors [FinFET] · CPC title

• H10D30/792

  comprising applied insulating layers, e.g. stress liners · CPC title

• H10D30/024

  of fin field-effect transistors [FinFET] · CPC title

• H10D84/0167

  Manufacturing their channels · CPC title

• H10D84/0193

  the components including FinFETs · CPC title