Semiconductor die, semiconductor package and substrate dicing method
US-2024421000-A1 · Dec 19, 2024 · US
US2016204033A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2016204033-A1 |
| Application number | US-201414913681-A |
| Country | US |
| Kind code | A1 |
| Filing date | Aug 6, 2014 |
| Priority date | Aug 22, 2013 |
| Publication date | Jul 14, 2016 |
| Grant date | — |
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Disclosed is a method for separating a substrate ( 1 ) along a separation pattern ( 4 ), in which method a substrate ( 1 ) is provided and an auxiliary layer ( 3 ) is applied to the substrate, said layer covering the substrate at least along the separation pattern. The substrate comprising the auxiliary layer is irradiated, such that the material of the auxiliary layer penetrates the substrate along the separation pattern in the form of an impurity. The substrate is broken along the separation pattern. A semiconductor chip ( 15 ) is also disclosed.
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1 . A method for separating a substrate along a separation pattern, comprising the following steps: a) providing the substrate; b) applying an auxiliary layer, which covers the substrate at least along the separation pattern, c) irradiating the substrate with the auxiliary layer, such that material of the auxiliary layer penetrates into the substrate as an impurity along the separation pattern; and d) breaking the substrate along the separation pattern. 2 . The method according to claim 1 , wherein the impurity embrittles the substrate along the separation pattern. 3 . The method according to claim 1 , wherein material of the auxiliary layer indiffuses into the substrate in step c). 4 . The method according to claim 1 , wherein in step c) the substrate melts locally and material of the auxiliary layer is alloyed therein. 5 . The method according to claim 1 , wherein the substrate is metallic. 6 . The method according to claim 1 , wherein the auxiliary layer contains an amide. 7 . The method according to claim 1 , wherein the auxiliary layer contains urea. 8 . The method according to claim 1 , wherein the auxiliary layer is applied to the substrate over the whole area in step b). 9 . The method according to claim 1 , wherein nitrogen is introduced into the substrate as the impurity along the separation pattern. 10 . The method according to claim 1 , wherein the irradiation in step c) is carried out by means of a laser in pulsed operation or in continuous wave operation. 11 . A semiconductor chip comprising a semiconductor body and a metallic substrate body, on which the semiconductor body is arranged, wherein a side surface of the metallic substrate body has a breaking edge. 12 . The semiconductor chip according to claim 11 , wherein the substrate body has, in an edge region adjoining the side surface, a concentration of an impurity that is at least twice as high as that in a region spaced apart from the side surface. 13 . The semiconductor chip according to claim 12 , wherein the impurity is nitrogen. 14 . The semiconductor chip according to claim 11 , wherein the substrate body contains molybdenum. 15 . (canceled) 16 . A semiconductor chip comprising a semiconductor body and a metallic substrate body, on which the semiconductor body is arranged, wherein a side surface of the metallic substrate body has a breaking edge, wherein the substrate body has, in an edge region adjoining the side surface, a concentration of an impurity that is at least twice as high as that in a region spaced apart from the side surface.
Alloying conductive materials with semiconductor bodies · CPC title
with electromagnetic radiation, e.g. laser annealing (laser cutting H10P54/20) · CPC title
within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase · CPC title
Metallic materials (H10W40/254, H10W40/257, H10W40/255, H10W40/251, H10W40/253 take precedence) · CPC title
characterised by their shape, e.g. having conical or cylindrical projections · CPC title
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