Use of metal phosphorus in metallization of photovoltaic devices and method of fabricating same

Patent metadata

Field	Value
Publication number	US-2016197208-A1
Application number	US-201615069514-A
Country	US
Kind code	A1
Filing date	Mar 14, 2016
Priority date	Jun 6, 2011
Publication date	Jul 7, 2016
Grant date	—

Abstract

A photovoltaic device, such as a solar cell, including a copper-containing-grid metallization structure that contains a metal phosphorus layer as a diffusion barrier is provided. The copper-containing-grid metallization structure includes, from bottom to top, an electroplated metal phosphorus layer that does not include copper or a copper alloy located within a grid pattern formed on a front side surface of a semiconductor substrate, and an electroplated copper-containing layer. A method of forming such a structure is also provided.

First claim

What is claimed is:

1 . A method of forming a photovoltaic device comprising:
providing a semiconductor substrate including a p-n junction with a p-type semiconductor portion and an n-type semiconductor portion one on top of the other, wherein an upper exposed surface of one of the semiconductor portions represents a front side surface of the semiconductor substrate; forming patterned antireflective coatings on the front side surface of the semiconductor substrate to provide a grid pattern on the front side surface, said grid pattern comprising exposed portions of the front side surface of the semiconductor substrate; electrodepositing a metal phosphorus layer on the exposed portions of the front side surface of the semiconductor substrate; and electrodepositing a copper-containing layer atop the metal phosphorus layer.

2 . The method of claim 1 , further comprising forming a metal semiconductor alloy layer on the exposed portions of the front side surface of the semiconductor substrate prior to electrodepositing the metal phosphorus layer, wherein said forming the metal semiconductor alloy layer comprises electrodepositing a metal layer and annealing.

3 . The method of claim 2 , wherein said metal semiconductor alloy layer is continuous.

4 . The method of claim 2 , wherein said metal semiconductor alloy layer is discontinuous

5 . The method of claim 1 , wherein said electrodepositing the metal phosphorus layer and said electrodepositing said copper-containing layer further comprise light illumination.

6 . The method of claim 1 , wherein said metal phosphorus layer comprises Ni or Co as a metal component.

7 . The method of claim 1 , wherein said electrodepositing the metal phosphorus layer includes providing a plating bath comprises at least one metal salt as a source of metal ions, and at least one phosphorus compound as a source of phosphorous ions.

8 . The method of claim 7 , wherein said at least one phosphorus compound is selected from the group consisting of phosphorus acid, hypophosphate and hypophosphorus acid.

9 . The method of claim 7 , wherein said at least one phosphorus compound is present in said plating bath in a concentration from 1 g/L to 100 g/L.

10 . The method of claim 1 , wherein said metal phosphorus layer comprises from 1 atomic % to 30 atomic % phosphorus.

11 . The method of claim 1 , wherein said metal phosphorus layer comprises nickel phosphorus and said copper-containing layer comprises copper, and wherein said metal phosphorus layer is in direct contact with the exposed portions of the front side surface of the semiconductor substrate.

12 . The method of claim 1 , wherein said metal phosphorus layer comprises cobalt phosphorus and said copper-containing layer comprises copper, and wherein said metal phosphorus layer is in direct contact with the exposed portions of the front side surface of the semiconductor substrate.

13 . The method of claim 1 , wherein said metal phosphorus layer comprises nickel phosphorus and said copper-containing layer comprises copper, and wherein said metal phosphorus layer is separated at least in part from the exposed portions of the front side surface of the semiconductor substrate by a nickel silicide layer.

14 . The method of claim 1 , wherein said metal phosphorus layer comprises cobalt phosphorus and said copper-containing layer comprises copper, and wherein said metal phosphorus layer is separated at least in part from the exposed portions of the front side surface of the semiconductor substrate by a nickel silicide layer.

15 . The method of claim 1 , wherein said p-type semiconductor portion is located beneath the n-type semiconductor portion.

Assignees

• IBM

Inventors

• Fisher Kathryn C
• Huang Qiang
• Papa Rao Satyavolu S

Classifications

• H10P14/47

  Electrolytic deposition, i.e. electroplating; Electroless plating · CPC title

• H10W20/425

  Barrier, adhesion or liner layers · CPC title

• H10W20/032

  of conductive barrier, adhesion or liner layers · CPC title

• H10F77/315

  the coatings being antireflective or having enhancing optical properties · CPC title

• H10F77/215

  Geometries of grid contacts · CPC title