Integrated circuit bonding with interposer die

US2016190071A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016190071-A1
Application numberUS-201414585323-A
CountryUS
Kind codeA1
Filing dateDec 30, 2014
Priority dateDec 30, 2014
Publication dateJun 30, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method of bonding components is disclosed. One embodiment of such a method includes applying both heat and pressure to a stack of components that includes an interposer with a reduced degree of warpage. Reducing the distance between the interposer and a first component of the stack of the components until a spacer prevents further reduction of that space. Then, cooling the stack of components while the pressure is maintained such that the degree of warpage of the interposer remains reduced.

First claim

Opening claim text (preview).

1 . A method of bonding components, the method comprising: placing an interposer having solder balls mounted thereto in a first jig, the first jig having a plurality of slots, the plurality of slots being configured to receive at least one of the solder balls; applying force to the interposer using the first jig such that an initial degree of warpage in the interposer is decreased; then mounting a device on the interposer, thereby forming a stack; transferring the stack from the first jig to a first chamber, wherein the first chamber comprises a bracket for receiving the solder balls of the interposer; and applying heat and pressure to the stack, thereby bonding the device to the interposer. 2 . The method of claim 1 , wherein the device comprises an integrated circuit, and wherein bonding the device to the interposer utilizes at least one of a furnace reflow process and a thermal compression bonding process while the initial degree of warpage of the interposer is decreased. 3 . The method of claim 1 , the method further comprising: forming the one or more bonds between the interposer and a first component using a process that reflows one or more solder balls of the interposer such that the one or more solder balls of the interposer are bonded to one or more electrical connections of the first component, wherein the bracket is located, at least in part, between the interposer and the first component and thereby limits a reduction of the distance between the interposer and the first component during formation of the one or more bonds between the interposer and the first component. 4 . The method of claim 2 , wherein the integrated circuit is bonded to the interposer such that one or more quantities of solder of the integrated circuit are bonded to one or more electrical connections of the interposer. 5 . The method of claim 3 , wherein the first component is an organic laminate with one or more electrical connections that align with one or more solder balls of the interposer. 6 . The method of claim 1 , wherein applying force to the interposer, using the first jig such that the initial degree of warpage is decreased, increases internal strain of the interposer. 7 . The method of claim 1 , wherein the first jig is configured to apply a vacuum to one side of the interposer such that the initial degree of warpage in the interposer is decreased. 8 . A method of bonding components, the method comprising: placing an interposer having solder balls mounted thereto in a first jig, the first jig having a plurality of slots, the plurality of slots being configured to receive at least one of the solder balls; applying force to the interposer using the first jig such that an initial degree of warpage in the interposer is decreased; then mounting an integrated circuit on the interposer, thereby forming a stack; transferring the stack from the first jig to a first chamber such that the interposer is between the integrated circuit and an organic laminate, the first chamber comprising ii) a bracket for receiving the solder balls of the interposer, and ii) the organic laminate; and applying heat and pressure to the stack, thereby bonding the interposer to the integrated circuit and the organic laminate. 9 . The method of claim 8 , wherein bonding the integrated circuit to the interposer utilizes at least one of a furnace reflow process and a thermal compression bonding process while the initial degree of warpage of the interposer is decreased. 10 . The method of claim 8 , the method further comprising: forming the one or more bonds between the interposer and the organic laminate using a process that reflows one or more solder balls of the interposer such that the one or more solder balls of the interposer are bonded to one or more electrical connections of the organic laminate, wherein the bracket is located, at least in part, between the interposer and the organic laminate and thereby limits a reduction of the distance between the interposer and the organic laminate during formation of the one or more bonds between the interposer and the organic laminate. 11 . The method of claim 8 , wherein the integrated circuit is bonded to the interposer such that one or more quantities of solder of the integrated circuit are bonded to one or more electrical connections of the interposer. 12 . The method of claim 8 , wherein the organic laminate includes one or more electrical connections that align with one or more solder balls of the interposer. 13 . The method of claim 8 , wherein applying force to the interposer, using the first jig such that the initial degree of warpage is decreased, increases internal strain of the interposer. 14 . The method of claim 8 , wherein the first jig is configured to apply a vacuum to one side of the interposer such that the initial degree of warpage in the interposer is decreased. 15 . The method of claim 8 , the method comprising: forming one or more electrical connections between the organic laminate and the integrated circuit, wherein applying both heat and pressure to a stack of components causes a reflow of one or both of one or more solder balls of the integrated circuit and one or more solder balls of the interposer. 16 . The method of claim 8 , wherein the organic laminate is a printed circuit board. 17 . A method of bonding components, the method comprising: placing an interposer having solder balls mounted thereto in a first jig, the first jig having a plurality of slots, the plurality of slots being configured to receive at least one of the solder balls; applying force to the interposer using the first jig such that an initial degree of warpage in the interposer is decreased; then mounting an integrated circuit on the interposer, thereby forming a stack, wherein the integrated circuit includes a plurality of solder balls that are aligned with a plurality of electrical contacts of the interposer; transferring the stack from the first jig to a first chamber such that the interposer is between the integrated circuit and a printed circuit board, the first chamber comprising ii) a bracket for receiving the solder balls of the interposer, and ii) the printed circuit board, wherein a plurality of electrical contacts of the printed circuit board are aligned with a plurality of solder balls of the interposer; and applying heat and pressure to the stack, thereby bonding the interposer to the integrated circuit and the printed circuit board, wherein applying both heat and pressure to the stack of components causes a reflow of one or more solder balls of the integrated circuit and one or more solder balls of the interposer such that one or more electrical connections are formed between the integrated circuit and the printed circuit board, wherein the bracket is located, at least in part, between the interposer and the printed circuit board and thereby limits a reduction of the distance between the interposer and the printed circuit board during bond formation between the interposer and the printed circuit board. 18 . The method of claim 17 , the method further comprising: wherein bonding the integrated circuit to the interposer utilizes at least one of a furnace reflow process and a thermal compression bonding process while the initial degree of warpage of the interposer is decreased. 19 . The method of claim 17 , wherein applying force to the interposer using the first jig such that the initial degree of warpage is decreased results in an increase in internal strain of the interposer.

Assignees

Inventors

Classifications

  • Soldering of electronic components · CPC title

  • Thermo-compression bonding · CPC title

  • Vacuum work holders · CPC title

  • for shaped solder piece feeding, e.g. preforms, bumps, balls, pellets, droplets · CPC title

  • with diffusion of soldering material · CPC title

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What does patent US2016190071A1 cover?
A method of bonding components is disclosed. One embodiment of such a method includes applying both heat and pressure to a stack of components that includes an interposer with a reduced degree of warpage. Reducing the distance between the interposer and a first component of the stack of the components until a spacer prevents further reduction of that space. Then, cooling the stack of components…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification H10W42/121. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Jun 30 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).