Low power operational transconductance amplifier

Patent metadata

Field	Value
Publication number	US-2016181983-A1
Application number	US-201414577950-A
Country	US
Kind code	A1
Filing date	Dec 19, 2014
Priority date	Dec 19, 2014
Publication date	Jun 23, 2016
Grant date	—

Abstract

A low power operational transconductance amplifier is disclosed. In an exemplary embodiment, an apparatus includes a transconductance stage configured to convert a first input voltage signal to first and second current signals and to convert a second input voltage signal to third and fourth current signals. The apparatus also includes a current amplification stage configured to amplify the second current signal to generate a first amplified current signal and to amplify the fourth current signal to generate a second amplified current signal. The apparatus also includes a current summation stage configured to sum together the third current signal and the first amplified current signal to generate a first output voltage signal, and to sum together the first current signal and the second amplified current signal to generate a second output voltage signal.

First claim

What is claimed is:

1 . An apparatus comprising:
a transconductance stage configured to convert a first input voltage signal to first and second current signals and to convert a second input voltage signal to third and fourth current signals; a current amplification stage configured to amplify the second current signal to generate a first amplified current signal and to amplify the fourth current signal to generate a second amplified current signal; and a current summation stage configured to sum together the third current signal and the first amplified current signal to generate a first output voltage signal, and to sum together the first current signal and the second amplified current signal to generate a second output voltage signal.

2 . The apparatus of claim 1 , the transconductance stage comprising:
first and second transconductance circuits configured to convert the first voltage signal to the first and second current signals; and third and fourth transconductance circuits configured to convert the second voltage signal to the third and fourth current signals.

3 . The apparatus of claim 2 , the first and third transconductance circuits have substantially the same transconductance values, and the second and fourth transconductance circuits have substantially the same transconductance values.

4 . The apparatus of claim 2 , the first transconductance circuit including a first cascode transistor pair configured to receive the first input voltage and generate the first current signal, the second transconductance circuit including a second cascode transistor pair configured to receive the first input voltage and generate the second current signal, the third transconductance circuit including a third cascode transistor pair configured to receive the second input voltage and generate the third current signal, the fourth transconductance circuit including a fourth cascode transistor pair configured to receive the second input voltage and generate the fourth current signal,

5 . The apparatus of claim 1 , the current amplification stage comprising:
a first current amplifier configured to amplify the second current signal by a first amplification factor to generate the first amplified current signal; and a second current amplifier configured to amplify the fourth current signal by a second amplification factor to generate the second amplified current signal.

6 . The apparatus of claim 5 , the first amplification factor is substantially the same as the second amplification factor.

7 . The apparatus of claim 5 , the first current amplifier including a first common source transistor having a drain terminal configured to receive the second current signal and a second common source transistor having a drain terminal configured to output the first amplified current signal and the second current amplifier including a third common source transistor having a drain terminal configured to receive the fourth current signal and a fourth common source transistor having a drain terminal configured to output the second amplified current signal.

8 . The apparatus of claim 1 , the current summation stage comprising:
a first summing circuit configured to sum together the third current signal and the first amplified current signal to form a first summed current and to convert the first summed current to the first output voltage signal based on a first impedance; and a second summing circuit configured to sum together the first current signal and the second amplified current signal to form a second summed current and to convert the second summed current to the second output voltage signal based on a second impedance.

9 . The apparatus of claim 8 , the first summing circuit including a first transistor having a drain terminal configured to receives the third current signal and a source terminal configured to receive the first amplified current signal to generate the first summed current, and the second summing circuit including a second transistor having a drain terminal configured to receive the first current signal and a source terminal configured to receive the second amplified current signal to generate the second summed current.

10 . The apparatus of claim 1 , the apparatus forming an operational transconductance amplifier.

11 . The apparatus of claim 1 , the first and second input voltage signals form a differential input signal and the first and second output voltage signals form a differential output signal.

12 . An apparatus comprising:
means for converting a first voltage signal to first and second current signals; means for converting a second voltage signal to third and fourth current signals; means for amplifying the second and fourth current signals to generate first and second amplified current signals, respectively; means for summing the third current signal and the first amplified current signal to generate a first output voltage signal; and means for summing the first current signal and the second amplified current signal to generate a second output voltage signal.

13 . The apparatus of claim 12 , the means for converting the first voltage signal comprising first and second transconductance circuits and the means for converting the second voltage signal comprising third and fourth transconductance circuits.

14 . The apparatus of claim 13 , the first and third transconductance circuits having substantially the same transconductance values, and the second and fourth transconductance circuits having substantially the same transconductance values.

15 . The apparatus of claim 11 , the means for amplifying amplifies the second current signal by an first amplification factor to generate the first amplified current signal and amplifies the fourth current signal by a second amplification factor to generate the second amplified current signal.

16 . The apparatus of claim 15 , the first amplification factor is substantially the same as the second amplification factor.

17 . The apparatus of claim 11 , the apparatus forming an operational transconductance amplifier.

18 . The apparatus of claim 11 , the first and second input voltage signals form a differential input signal and the first and second output voltage signals form a differential output signal.

19 . A method comprising:
converting a first voltage signal to first and second current signals; converting a second voltage signal to third and fourth current signals; amplifying the second and fourth current signals to generate first and second amplified current signals, respectively; summing the third current signal and the first amplified current signal to generate a first output voltage signal; and summing the first current signal and the second amplified current signal to generate a second output voltage signal.

20 . The method of claim 19 , the first and second input voltage signals form a differential input signal and the first and second output voltage signals form a differential output signal.

Assignees

• Qualcomm Inc

Inventors

• Kiran Ganesh

Classifications

• H03F1/0205 Primary

  in transistor amplifiers · CPC title

• H03F1/223

  with MOSFET's · CPC title

• H03F3/45179

  using MOSFET transistors as the active amplifying circuit (H03F3/45278 takes precedence) · CPC title

• H03F2203/45288

  Differential amplifier with circuit arrangements to enhance the transconductance · CPC title

• H03F2203/45644

  the LC comprising a cross coupling circuit, e.g. comprising two cross-coupled transistors · CPC title