Matrix circuit detecting failure location in common signal

Patent metadata

Field	Value
Publication number	US-2016178689-A1
Application number	US-201514974465-A
Country	US
Kind code	A1
Filing date	Dec 18, 2015
Priority date	Dec 19, 2014
Publication date	Jun 23, 2016
Grant date	—

Abstract

A matrix circuit includes, besides a plurality of common signal lines and a plurality of data signal lines arranged in a matrix, a plurality of monitoring signal lines that allow states of the common signal lines to be monitored. Inputs to the monitoring signal lines during one scan of the common signal lines are stored such that a fault including a ground fault, a short circuit, or disconnection on any of the common signal lines is detected and a location of the faulty common signal line is identified based on the stored inputs to the monitoring signal lines.

First claim

1 . A matrix circuit of a sink type having m (m is a natural number) common signal lines and n (n is a natural number) data signal lines, the common signal lines and the data signal lines being arranged in a matrix, and m×n switches each connected between the common signal line and the data signal line intersecting each other, the matrix circuit being configured such that states of keys are scanned by driving the common signal lines to a low level one by one while reading states of the data signal lines,
the matrix circuit comprising:
p (p is a natural number) monitoring signal lines that allow states of the common signal lines to be monitored;
a storage unit in which inputs to the monitoring signal lines during one scan of the common signal lines are stored; and
a detection unit that detects occurrence of a fault including a ground fault, a short circuit, or disconnection on any of the common signal lines to identify the faulty common signal line.

2 . A matrix circuit of a sink type having m (m is a natural number) common signal lines and n (n is a natural number) data signal lines, the common signal lines and the data signal lines being arranged in a matrix, and m×n switches each connected between the common signal line and the data signal line intersecting each other, the matrix circuit being configured such that states of keys are scanned by driving the common signal lines to a low level one by one while reading states of the data signal lines,
the matrix circuit comprising:
p (p is a natural number) monitoring signal lines that allow states of the common signal lines to be monitored; and
a detection unit that detects a ground fault on any of the common signal lines and that identifies the common signal line on which the ground fault has occurred.

3 . A matrix circuit of a source type having m (m is a natural number) common signal lines and n (n is a natural number) data signal lines, the common signal lines and the data signal lines being arranged in a matrix, and m×n switches each connected between the common signal line and the data signal line intersecting each other, the matrix circuit being configured such that states of keys are scanned by driving the common signal lines to a high level one by one while reading states of the data signal lines,
the matrix circuit comprising:
p (p is a natural number) monitoring signal lines that allow states of the common signal lines to be monitored;
a storage unit in which inputs to the monitoring signal lines during one scan of the common signal lines are stored; and
a detection unit that detects occurrence of a fault including a ground fault, a short circuit, or disconnection on any of the common signal lines to identify the faulty common signal line.

4 . The matrix circuit according to claim 1 , wherein
when a ground fault has occurred on any of the common signal lines, the detection unit: determines that a ground fault has occurred on the common signal line when all of the inputs to the monitoring signal lines are not 0 or at a high level during a non-scan period when none of the common signal lines are driven; and determines a location of the ground fault on the common signal line based on data input to the monitoring signal lines.

5 . The matrix circuit according to claim 1 , wherein
when a ground fault has occurred on any of the common signal lines, the detection unit: detects occurrence of a fault on the common signal line and stores the inputs to the monitoring signal lines for one scan in the storage unit when the inputs to the monitoring signal lines during the scan are different from the inputs to the monitoring signal lines during a normal period; further determines that the fault on the common signal line is a ground fault when the stored inputs to the monitoring signal lines are constantly 1 or at a low level; and determines a location of the ground fault on the common signal line based on data input to the monitoring signal lines and stored in the storage unit.

6 . The matrix circuit according to claim 1 , wherein
when a short circuit has occurred on any of the common signal lines, the detection unit: detects occurrence of a fault on the common signal line and stores the inputs to the monitoring signal lines for one scan in the storage unit when the inputs to the monitoring signal lines during the scan are different from the inputs to the monitoring signal lines during a normal period; further determines that the fault on the common signal line is a short circuit when the stored inputs to the monitoring signal lines are the same as the inputs to the monitoring signal lines during a different scan of the common signal lines; and determines a location of the short circuit on the common signal line based on data input to the monitoring signal lines and stored in the storage unit.

7 . The matrix circuit according to claim 1 , wherein
when disconnection has occurred on any of the common signal lines, the detection unit: detects occurrence of a fault on the common signal line and stores the inputs to the monitoring signal lines for one scan in the storage unit when the inputs to the monitoring signal lines during the scan are different from the inputs to the monitoring signal lines during a normal period; further determines that the fault on the common signal line is disconnection when all of the stored inputs to the monitoring signal line are 0 or at a high level; and determines a location of the disconnection on the common signal line based on data input to the monitoring signal lines and stored in the storage unit.

8 . The matrix circuit according to claim 1 , wherein
the inputs to the monitoring signal lines during a non-scan period and during a scan period are output to a display unit when the fault occurs.

9 . The matrix circuit according to claim 2 , wherein
when a ground fault has occurred on any of the common signal lines, the detection unit: determines that a ground fault has occurred on the common signal line when all of the inputs to the monitoring signal lines are not 0 or at a high level during a non-scan period when none of the common signal lines are driven; and determines a location of the ground fault on the common signal line based on data input to the monitoring signal lines.

10 . The matrix circuit according to claim 2 , wherein
the inputs to the monitoring signal lines during a non-scan period are output to a display unit when the fault occurs.

11 . The matrix circuit according to claim 3 , wherein
when a ground fault or disconnection has occurred on any of the common signal lines, the detection unit: detects occurrence of a fault on the common signal line and stores the inputs to the monitoring signal lines for one scan in the storage unit when the inputs to the monitoring signal lines during the scan are different from the inputs to the monitoring signal lines during a normal period; further determines that the fault on the common signal line is a ground fault or disconnection when all of the stored inputs to the monitoring signal line are 0 or at a high level; and determines a location of the ground fault or the disconnection on the common signal line based on data input to the monitoring signal lines and stored in the storage unit.

Assignees

• Fanuc Corp

Inventors

• Okita Hiroshi

Classifications

• G01R31/50

  Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections (testing of sparking plugs H01T13/58) · CPC title

• G01R31/08 Primary

  Locating faults in cables, transmission lines, or networks · CPC title

• G01R31/086

  in power transmission or distribution networks, i.e. with interconnected conductors · CPC title

• G06F11/2221 Primary

  to test input/output devices or peripheral units · CPC title

• G01R31/52

  Testing for short-circuits, leakage current or ground faults · CPC title