Power semiconductor module and power conversion device

US2016172995A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016172995-A1
Application numberUS-201614992762-A
CountryUS
Kind codeA1
Filing dateJan 11, 2016
Priority dateMar 1, 2012
Publication dateJun 16, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A power semiconductor module capable of reducing variation of inductance between upper/lower arms and reducing variation of current caused by the variation of inductance. The power semiconductor module includes circuit blocks (upper/lower arms) each of which is configured by connecting self-arc-extinguishing type semiconductor elements in series; first and second positive electrode terminals, first and second negative electrode terminals, and first and second AC terminals. Further, there are first and second wiring patterns that connect the self-arc-extinguishing type semiconductor elements to the DC and AC terminals. The outline of the power semiconductor module has a substantially quadrangular surface.

First claim

Opening claim text (preview).

1 . (canceled) 2 . A power semiconductor module, comprising: a first set of an upper arm and a lower arm which includes a plurality of self-arc extinguishing type semiconductor elements series-connected each other; a second set of an upper arm and a lower arm which includes a plurality of self-arc extinguishing type semiconductor elements series-connected each other and is connected in parallel to the first set of an upper arm and a lower arm; a first positive electrode side DC terminal connected to the first set of an upper arm and a lower arm; a second positive electrode side DC terminal connected to the second set of an upper arm and a lower arm; a first negative electrode side DC terminal connected to the first set of an upper arm and a lower arm; a second negative electrode side DC terminal connected to the second set of an upper arm and a lower arm; a first AC terminal connected to the first set of an upper arm and a lower arm; a second AC terminal connected to the second set of an upper arm and a lower arm; a first wiring pattern which connects the first set of an upper arm and a lower arm to the first positive electrode side DC terminal, the first negative electrode side DC terminal, and the first AC terminal; and a second wiring pattern which connects each of the second set of an upper arm and a lower arm to the second positive electrode side DC terminal, the second negative electrode side DC terminal, and the second AC terminal, wherein an outline of the power semiconductor module has a substantially quadrangular surface; the first and second positive electrode side DC terminals and the first and second negative electrode side DC terminals are disposed at a side of the substantially quadrangular surface; the first and second AC terminals are disposed at a side which is opposite to the side; and the first positive electrode side DC terminal and the first negative electrode side DC terminal are disposed in mirror symmetry with the second positive electrode side DC terminal and the second negative electrode side DC terminal. 3 . A power semiconductor module, comprising: a first set of an upper arm and a lower arm which includes a plurality of self-arc extinguishing type semiconductor elements series-connected each other; a second set of an upper arm and a lower arm which includes a plurality of self-arc extinguishing type semiconductor elements series-connected each other and is connected in parallel to the first set of an upper arm and a lower arm; a first positive electrode side DC terminal connected to the first set of an upper arm and a lower arm; a second positive electrode side DC terminal connected to the second set of an upper arm and a lower arm; a first negative electrode side DC terminal connected to the first set of an upper arm and a lower arm; a second negative electrode side DC terminal connected to the second set of an upper arm and a lower arm; a first AC terminal connected to the first set of an upper arm and a lower arm; a second AC terminal connected to the second set of an upper arm and a lower arm; a first wiring pattern which connects the first set of an upper arm and a lower arm to the first positive electrode side DC terminal, the first negative electrode side DC terminal, and the first AC terminal; and a second wiring pattern which connects each of the second set of an upper arm and a lower arm to the second positive electrode side DC terminal, the second negative electrode side DC terminal, and the second AC terminal, wherein an outline of the power semiconductor module has a substantially quadrangular surface; the first and second positive electrode side DC terminals, the first and second negative electrode side DC terminals, and the first and second AC terminals are disposed within the substantially quadrangular surface in an order of the positive electrode side DC terminal, the negative electrode side DC terminal, and the AC terminal; and the first positive electrode side DC terminal and the first negative electrode side DC terminal are disposed in mirror symmetry with the second positive electrode side DC terminal and the second negative electrode side DC terminal. 4 . The power semiconductor module in claim 2 , wherein the first AC terminal is disposed in mirror symmetry with the second AC terminal based on a symmetrical axis; and the first wiring pattern is disposed in mirror symmetry with the second wiring pattern based on the same symmetrical axis for the AC patterns. 5 . The power semiconductor module in claim 3 , wherein the first AC terminal is disposed in mirror symmetry with the second AC terminal based on a symmetrical axis; and the first wiring pattern is disposed in mirror symmetry with the second wiring pattern based on the same symmetrical axis for the AC patterns. 6 . The power semiconductor module in claim 2 , wherein the first positive electrode side DC terminal and the first negative electrode side DC terminal are disposed in mirror symmetry with the second positive electrode side DC terminal and the second negative electrode side DC terminal based on a right-angle axis with the side of the substantially quadrangular surface where the positive electrode side DC terminals and the negative electrode side DC terminals are disposed. 7 . The power semiconductor module in claim 2 , wherein the first wiring pattern is disposed in mirror symmetry with the second wiring pattern based on a right-angle axis with the side of the substantially quadrangular surface where the positive electrode side DC terminals and the negative electrode side DC terminals are disposed. 8 . The power semiconductor module in claim 2 , wherein the first wiring pattern has a first negative electrode terminal pattern portion which connects the first set of an upper arm and a lower arm to the first negative electrode side DC terminal; the second wiring pattern has a second negative electrode terminal pattern portion which connects the second set of an upper arm and a lower arm to the second negative electrode side DC terminal; and the first negative electrode terminal pattern portion is connected to the second negative electrode terminal pattern portion in the power semiconductor module. 9 . The power semiconductor module in claim 2 , wherein the first wiring pattern has a first control wiring pattern portion connected to control electrodes of the self-arc-extinguishing type semiconductor elements of the first set of an upper arm and a lower arm; the second wiring pattern has a second control wiring pattern portion connected to control electrodes of the self-arc-extinguishing type semiconductor elements of the second set of an upper arm and a lower arm; and a relationship between a direction of gate charge/discharge current, flowing through the control wiring pattern portion, of the self-arc-extinguishing type semiconductor element and a direction of principal current flowing through the self-arc-extinguishing type semiconductor element is unified in the first and second set of an upper arm and a lower arms. 10 . The power semiconductor module in claim 2 , wherein the first AC terminal and the second AC terminal are electrically connected each other at the same electric potential. 11 . The power semiconductor module in claim 3 , wherein the first AC terminal and the second AC terminal are electrically connected each other at the same electric potential. 12 . The power semiconductor module in claim 2 , wherein a distance between the first positive electrode side DC terminal and the first negative electrode side DC terminal is shorter than a distance between the first positive electrode side DC

Assignees

Inventors

Classifications

  • H02M7/003Primary

    Constructional details, e.g. physical layout, assembly, wiring or busbar connections · CPC title

  • using semiconductor devices only, e.g. single switched pulse inverters · CPC title

  • characterised by the heat transfer by conduction from the heat generating element to a dissipating body (arrangements for increasing/decreasing heat-transfer, e.g. fins details, F28F13/00) · CPC title

  • wherein modules are associated together, e.g. electromechanical assemblies, modular structures · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

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What does patent US2016172995A1 cover?
A power semiconductor module capable of reducing variation of inductance between upper/lower arms and reducing variation of current caused by the variation of inductance. The power semiconductor module includes circuit blocks (upper/lower arms) each of which is configured by connecting self-arc-extinguishing type semiconductor elements in series; first and second positive electrode terminals, f…
Who is the assignee on this patent?
Obiraki Yoshiko, Nakayama Yasushi, Miyazaki Yuji, and 2 more
What technology area does this patent fall under?
Primary CPC classification H02M7/003. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Jun 16 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).