Semiconductor device

Patent metadata

Field	Value
Publication number	US-2016163703-A1
Application number	US-201314906588-A
Country	US
Kind code	A1
Filing date	Sep 17, 2013
Priority date	Sep 17, 2013
Publication date	Jun 9, 2016
Grant date	—

Abstract

A semiconductor device includes a first MOS transistor and a second MOS transistor of a second conductivity type. The first MOS transistor includes a first main electrode connected to a first potential and a second main electrode connected to a second potential. The second MOS transistor includes a first main electrode connected to a control electrode of the first MOS transistor and a second main electrode connected to the second potential. The control electrodes of the first and second MOS transistors are connected in common. The first and second MOS transistors are formed on a common wide bandgap semiconductor substrate. In the first MOS transistor, a main current flows in a direction perpendicular to a main surface of the wide bandgap semiconductor substrate. In the second MOS transistor, a main current flows in a direction parallel to the main surface of the wide bandgap semiconductor substrate.

First claim

1 . A semiconductor device comprising:
a first MOS transistor of a first conductivity type including a first main electrode connected to a first potential and a second main electrode connected to a second potential; and a second MOS transistor of a second conductivity type including a first main electrode connected to a control electrode of said first MOS transistor and a second main electrode connected to said second potential, wherein said control electrode of said first MOS transistor and a control electrode of said second MOS transistor are connected in common, said first and second MOS transistors are formed on a common wide bandgap semiconductor substrate, in said first MOS transistor, a main current flows in a direction perpendicular to a main surface of said wide bandgap semiconductor substrate, and in said second MOS transistor, a main current flows in a direction parallel to the main surface of said wide bandgap semiconductor substrate.

2 . The semiconductor device according to claim 1 , wherein
said first conductivity type is an n-channel type, said second conductivity type is a p-channel type, and said second MOS transistor has a threshold voltage on a negative side that is set to be lower than a threshold voltage of said first MOS transistor on the negative side.

3 . The semiconductor device according to claim 1 , wherein
said wide bandgap semiconductor substrate includes:
a unit cell region that includes a plurality of said first MOS transistors as unit cells and has a quadrilateral shape in plan view; and
a termination junction region that surrounds said unit cell region,
said termination junction region includes a ground wire that surrounds said unit cell region in a close proximity to said unit cell region, and said second main electrode of said second MOS transistor is connected to said ground wire.

4 . The semiconductor device according to claim 1 , wherein said second main electrode of said second MOS transistor is connected to said second potential through said second main electrode of said first MOS transistor.

5 . The semiconductor device according to claim 1 , wherein
said wide bandgap semiconductor substrate includes:
a unit cell region that includes a plurality of said first MOS transistors as unit cells and has a quadrilateral shape in plan view; and
a termination junction region that surrounds said unit cell region,
said unit cell region has an inwardly recessed portion and includes a pad region located in the recessed portion and provided for wire bonding, said pad region is electrically connected with said control electrode of said first MOS transistor, and said second MOS transistor is formed in said pad region.

6 . The semiconductor device according to claim 5 , wherein
said termination junction region includes a ground wire that surrounds said unit cell region in a close proximity to said unit cell region, and said second main electrode of said second MOS transistor is connected to said ground wire.

7 . A semiconductor device comprising:
a first MOS transistor of a first conductivity type including a first main electrode connected to a first potential and a second main electrode connected to a second potential; a current sensing MOS transistor of the first conductivity type including a first main electrode connected to said first potential and a second main electrode connected to said second potential; and a second MOS transistor of a second conductivity type including a first main electrode connected to a control electrode of said current sensing MOS transistor and a second main electrode connected to said second potential, wherein said control electrode of said current sensing MOS transistor and a control electrode of said second MOS transistor are connected in common, said first and second MOS transistors and said current sensing MOS transistor are formed on a common wide bandgap semiconductor substrate, in said first MOS transistor and said current sensing MOS transistor, a main current flows in a direction perpendicular to a main surface of said wide bandgap semiconductor substrate, and in said second MOS transistor, a main current flows in a direction parallel to the main surface of said wide bandgap semiconductor substrate.

8 . The semiconductor device according to claim 7 , wherein
said wide bandgap semiconductor substrate includes:
a unit cell region that includes a plurality of said first MOS transistors as unit cells and has a quadrilateral shape in plan view; and
a termination junction region that surrounds said unit cell region,
said unit cell region has an inwardly recessed portion and includes a pad region located in the recessed portion and provided for wire bonding, said pad region is electrically connected with said second main electrode of said current sensing MOS transistor, and said second MOS transistor is formed in said pad region.

9 . The semiconductor device according to claim 7 , wherein
said first conductivity type is an n-channel type, said second conductivity type is a p-channel type, and said second MOS transistor has a threshold voltage on a negative side that is set to be lower than a threshold voltage of said current sensing MOS transistor on the negative side.

10 . The semiconductor device according to claim 1 , wherein said second MOS transistor includes a gate oxide film having a thickness identical to a thickness of a field oxide film of said first MOS transistor.

11 . The semiconductor device according to claim 1 , wherein said wide bandgap semiconductor substrate includes SiC or GaN as a wide bandgap semiconductor.

12 . The semiconductor device according to claim 7 , wherein said second MOS transistor includes a gate oxide film having a thickness identical to a thickness of a field oxide film of said first MOS transistor.

13 . The semiconductor device according to claim 7 , wherein said wide bandgap semiconductor substrate includes SiC or GaN as a wide bandgap semiconductor.

Assignees

• Mitsubishi Electric Corp

Inventors

• Kaguchi Naoto
• Suekawa Eisuke
• Ikegami Masaaki

Classifications

• H10W72/926

  Multiple bond pads having different sizes · CPC title

• H10D89/10

  Integrated device layouts · CPC title

• H10D84/141

  VDMOS having built-in components · CPC title

• H10D84/035

  using silicon carbide [SiC] technology · CPC title

• H10D84/01

  Manufacture or treatment · CPC title