Methods of fabricating low melting point solder reinforced sealant and structures formed thereby

US2016151850A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016151850-A1
Application numberUS-201615017398-A
CountryUS
Kind codeA1
Filing dateFeb 5, 2016
Priority dateDec 30, 2009
Publication dateJun 2, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Methods and associated structures of forming a package structure including forming a low melting point solder material on a solder resist opening location of an IHS keep out zone, forming a sealant in a non SRO keep out zone region; attaching the IHS to the sealant, and curing the sealant, wherein a solder joint is formed between the IHS and the low melting point solder material.

First claim

Opening claim text (preview).

What is claimed is: 1 . A method comprising: forming a low melting point solder material on a location of an IHS; forming a sealant in a non SRO KOZ region of a substrate; attaching the IHS to the sealant; and curing the sealant, wherein a solder joint is formed between the IHS and the substrate. 2 . The method of claim 1 wherein the low melting point solder melts at or below the cure temperature of the sealant. 3 . The method of claim 1 wherein the low melting point solder comprises a melting temperature of below about 165 degrees Celsius. 4 . The method of claim 1 further comprising wherein the temperature profile used for the sealant cure will simultaneously create a solder joint between IHS and substrate. 5 . The method of claim 1 further comprising modifying the substrate by forming SRO regions in the KOZ and exposing surface copper areas within the SRO regions of the substrate. 6 . The method of claim 5 further comprising exposing metal pads on the surface copper areas, wherein the surface copper areas react with the low melting point solder to form the solder joint between the substrate and the IHS. 7 . The method of claim 1 further comprising forming flux coated low melting point solder to the IHS at least one of corner and notch locations of the IHS. 8 . The method of claim 1 further comprising wherein the sealant is dispensed in the IHS KOZ but not in the SRO regions. 9 . The method of claim 1 wherein the low melting point solder melts at a temperature at or below the cure temperature of the sealant to form a joint between the substrate and the IHS. 11 . The method of claim 1 further comprising wherein the IHS comprises an OSP on an inner portion of the IHS. 11 . The method of claim 10 wherein the OSP is removed during the curing of the sealant. 12 . A method comprising: forming an SRO in a KOZ of a substrate; forming a flux in the SRO; forming a silicone sealant in the KOZ of the substrate; attaching the IHS to the sealant; and curing the sealant.

Assignees

Inventors

Classifications

  • Fluxing, i.e. applying flux onto surfaces · CPC title

  • Preliminary treatment of work or areas to be soldered, e.g. in respect of a galvanic coating · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • Bump connectors and die-attach connectors · CPC title

  • characterised by their shape, e.g. having conical or cylindrical projections · CPC title

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Frequently asked questions

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What does patent US2016151850A1 cover?
Methods and associated structures of forming a package structure including forming a low melting point solder material on a solder resist opening location of an IHS keep out zone, forming a sealant in a non SRO keep out zone region; attaching the IHS to the sealant, and curing the sealant, wherein a solder joint is formed between the IHS and the low melting point solder material.
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification B23K1/0016. Mapped technology areas include Operations & Transport.
When was this patent published?
Publication date Thu Jun 02 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).