Semiconductor device and method for producing semiconductor device
US-2016322425-A1 · Nov 3, 2016 · US
US2016149128A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2016149128-A1 |
| Application number | US-201414553443-A |
| Country | US |
| Kind code | A1 |
| Filing date | Nov 25, 2014 |
| Priority date | Nov 25, 2014 |
| Publication date | May 26, 2016 |
| Grant date | — |
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Selector elements that can be suitable for nonvolatile memory device applications are disclosed. The selector element can have low leakage currents at low voltages to reduce sneak current paths for non-selected devices, and higher leakage currents at higher voltages to minimize voltage drops during device switching. The selector element can be based on multilayer film stacks (e.g. metal-semiconductor-metal (MSM) stacks). A structure including diamond-like carbon (DLC) can be used to surround the semiconductor layer of the MSM stack. The high thermal conductivity of the DLC structure may serve to remove heat from the selector device while higher currents are flowing through the selector element. This may lead to improved reliability and improved endurance.
Opening claim text (preview).
1 . A nonvolatile memory cell comprising: a first electrode layer; a selector element; wherein the selector element comprises a first conductive layer, a first interface layer, a semiconductor layer, a second interface layer, and a second conductive layer; wherein the semiconductor layer is further surrounded by a layer of diamond like carbon (DLC), wherein the DLC layer comprises a concentration of hydrogen of less than 5 atomic %; and a second electrode layer. 2 . The nonvolatile memory cell as in claim 1 , wherein a thickness of the semiconductor layer is between about 10 nm and about 40 nm. 3 . The nonvolatile memory cell as in claim 1 , wherein a thickness of the DLC layer is between about 10 nm and about 40 nm. 4 . The nonvolatile memory cell as in claim 1 , wherein each of the first interface layer and second interface layer comprise carbon. 5 . The nonvolatile memory cell as in claim 1 , wherein the first conductive layer comprises one of tungsten, titanium nitride, or a combination thereof. 6 . The nonvolatile memory cell as in claim 1 , wherein the second conductive layer comprises one of tungsten, titanium nitride, or a combination thereof. 7 . The nonvolatile memory cell as in claim 1 , wherein the first conductive layer and the second conductive layer comprise a same material. 8 . The nonvolatile memory cell as in claim 1 , wherein the first conductive layer and the second conductive layer comprise a different material. 9 . The nonvolatile memory cell as in claim 1 , wherein a thickness of each of the first conductive layer and the second conductive layer is between about 10 nm and about 100 nm. 10 . The nonvolatile memory cell as in claim 1 , wherein a thickness of each of the first conductive layer and the second conductive layer is about 50 nm. 11 . The nonvolatile memory cell as in claim 1 , wherein the DLC layer comprises a fraction of sp 3 hybridized carbon expressed as a total fraction of bonded carbon (([sp 3 ]/([sp 3 ]+[sp 2 ]))×100) of greater than 50%. 12 . (canceled) 13 . A nonvolatile memory cell comprising: a first electrode layer, wherein the first electrode layer comprises tungsten; a selector element; wherein the selector element comprises a first conductive layer, a first interface layer, a semiconductor layer, a second interface layer, and a second conductive layer; wherein the semiconductor layer is further surrounded by a layer of diamond like carbon (DLC), wherein the DLC layer comprises a concentration of hydrogen of less than 5 atomic %; and a second electrode layer, wherein the first electrode layer comprises tungsten. 14 . The nonvolatile memory cell as in claim 13 , wherein a thickness of the semiconductor layer is between about 10 nm and about 40 nm. 15 . The nonvolatile memory cell as in claim 13 , wherein a thickness of the DLC layer is between about 10 nm and about 40 nm. 16 . The nonvolatile memory cell as in claim 13 , wherein the semiconductor layer comprises silicon. 17 . The nonvolatile memory cell as in claim 13 , wherein a thickness of each of the first conductive layer and the second conductive layer is between about 10 nm and about 100 nm. 18 . The nonvolatile memory cell as in claim 13 , wherein a thickness of each of the first conductive layer and the second conductive layer is about 50 nm. 19 . The nonvolatile memory cell as in claim 13 , wherein the DLC layer comprises a fraction of sp 3 hybridized carbon expressed as a total fraction of bonded carbon (([sp 3 ]/([sp 3 ]+[sp 2 ]))×100) of greater than 50%. 20 . (canceled)
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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