Euv mask and manufacturing method by using the same

US2016147138A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016147138-A1
Application numberUS-201514736669-A
CountryUS
Kind codeA1
Filing dateJun 11, 2015
Priority dateNov 26, 2014
Publication dateMay 26, 2016
Grant date

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

The present disclosure provides a photolithography mask. The photolithography mask includes a substrate that contains a low thermal expansion material (LTEM). A reflective structure is disposed over the substrate. A capping layer is disposed over the reflective structure. An absorber layer is disposed over the capping layer. The absorber layer contains a material that has a refractive index in a range from about 0.95 to about 1.01 and an extinction coefficient greater than about 0.03.

First claim

Opening claim text (preview).

What is claimed is: 1 . A photolithography mask, comprising: a substrate that contains a low thermal expansion material (LTEM); a reflective structure disposed over the substrate; a capping layer disposed over the reflective structure; and an absorber layer disposed over the capping layer, wherein the absorber layer contains a material that has a refractive index in a range from about 0.95 to about 1.01 and an extinction coefficient greater than about 0.03. 2 . The photolithography mask of claim 1 , wherein the refractive index of the material of the absorber layer is in a range from 0.975 to 1. 3 . The photolithography mask of claim 2 , wherein the refractive index of the material of the absorber layer is in a range from 0.985 to 0.995. 4 . The photolithography mask of claim 1 , wherein the extinction coefficient of the absorber layer is in a range from 0.4 to 0.54. 5 . The photolithography mask of claim 1 , wherein the material of the absorber layer includes one of: Radium, Al, Te, Cu, or Ge. 6 . The photolithography mask of claim 1 , further comprising a buffer layer disposed between the capping layer and the absorber layer, wherein the buffer layer and the absorber layer have different etching characteristics. 7 . The photolithography mask of claim 1 , wherein the reflective structure is configured to provide high reflectivity to a predefined radiation wavelength. 8 . The photolithography mask of claim 1 , wherein: the LTEM includes TiO 2 doped SiO 2 ; the reflective structure includes a plurality of Mo/Si film pairs or a plurality of Mo/Be film pairs; and the capping layer contains silicon. 9 . A wafer manufacturing process, comprising: forming a material layer over a substrate; forming a photoresist layer over the material layer; and patterning the photoresist layer using an extreme ultraviolet (EUV) mask in a photolithography process, wherein the EUV mask includes: a substrate that contains a low thermal expansion material (LTEM); a reflective structure disposed over the substrate; a capping layer disposed over the reflective structure; and an absorber layer disposed over the capping layer, wherein the absorber layer contains a material that has a refractive index in a range from about 0.95 to about 1.01 and an extinction coefficient greater than about 0.03. 10 . The wafer manufacturing process of claim 9 , further comprising directing EUV radiation onto the EUV mask via an illuminator, wherein the illuminator contains a dipole illumination component. 11 . The wafer manufacturing process of claim 9 , wherein the patterning of the photoresist layer comprises exposing the photoresist layer to EUV radiation and thereafter developing the exposed photoresist layer to form patterned photoresist features. 12 . The wafer manufacturing process of claim 9 , wherein: the LTEM substrate contains TiO 2 doped SiO 2 ; the reflective structure includes a plurality of Mo/Si film pairs or a plurality of Mo/Be film pairs; and the capping layer contains silicon. 13 . The wafer manufacturing process of claim 9 , further comprising forming a buffer layer disposed between the capping layer and the absorber layer, wherein the buffer layer and the absorber layer have different etching characteristics. 14 . The wafer manufacturing process of claim 9 , wherein the refractive index of the material of the absorber layer is in a range from 0.975 to 1. 15 . The wafer manufacturing process of claim 14 , wherein the refractive index of the material of the absorber layer is in a range from 0.985 to 0.995. 16 . The wafer manufacturing process of claim 9 , wherein the extinction coefficient of the absorber layer is in a range from 0.4 to 0.54. 17 . The wafer manufacturing process of claim 9 , wherein the material of the absorber layer includes one of: Radium, Al, Te, Cu, or Ge. 18 . A method of fabricating a photolithography mask, comprising: forming a reflective structure over a low thermal expansion material (LTEM) substrate; forming a capping layer over the reflective structure; and forming an absorber layer over the capping layer, wherein the absorber layer contains a material that has a refractive index in a range from about 0.95 to about 1.01 and an extinction coefficient greater than about 0.03. 19 . The method of claim 18 , wherein the forming of the absorber layer is performed such that: the refractive index of the material of the absorber layer is in a range from 0.985 to 0.995; and the extinction coefficient of the absorber layer is in a range from 0.4 to 0.54. 20 . The method of claim 18 , wherein the forming of the absorber layer is performed such that the material of the absorber layer includes one of: Radium, Al, Te, Cu, or Ge.

Assignees

Inventors

Classifications

  • Absorbers, e.g. of opaque materials · CPC title

  • G03F1/24Primary

    Reflection masks; Preparation thereof · CPC title

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What does patent US2016147138A1 cover?
The present disclosure provides a photolithography mask. The photolithography mask includes a substrate that contains a low thermal expansion material (LTEM). A reflective structure is disposed over the substrate. A capping layer is disposed over the reflective structure. An absorber layer is disposed over the capping layer. The absorber layer contains a material that has a refractive index in …
Who is the assignee on this patent?
Taiwan Semiconductor Mfg
What technology area does this patent fall under?
Primary CPC classification G03F1/24. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu May 26 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).