Semiconductor package with package-on-package stacking capability and method of manufacturing the same
US-2016197063-A1 · Jul 7, 2016 · US
US2016143129A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2016143129-A1 |
| Application number | US-201514938900-A |
| Country | US |
| Kind code | A1 |
| Filing date | Nov 12, 2015 |
| Priority date | Nov 13, 2014 |
| Publication date | May 19, 2016 |
| Grant date | — |
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A circuit board includes a first thermally conductive structure comprising a cavity or a recess portion. At least a portion of the first thermally conductive structure is inserted into an insulating part. An electronic device comprising a portion thereof inserted in the cavity or the recess portion.
Opening claim text (preview).
What is claimed is: 1 . A circuit board, comprising: a first thermally conductive structure comprising a cavity or a recess portion, wherein at least a portion of the first thermally conductive structure is inserted into an insulating part; and an electronic device comprising a portion thereof inserted in the cavity or the recess portion. 2 . The circuit board of claim 1 , further comprising: a signal via comprising a surface in contact with the electronic device; and a heat distribution via comprising a surface in contact with the first thermally conductive structure. 3 . The circuit board of claim 2 , further comprising: a first metal pattern configured to be in contact with the surface of the heat distribution via; and a second metal pattern configured to be in contact with the surface of the signal via, wherein heat flowing through the first metal pattern is greater than heat flowing through the second metal pattern. 4 . The circuit board of claim 3 , wherein a first electronic component is mounted on the upper portion of the circuit board and the first electronic component comprises a first region and a second region, wherein a temperature of the second region increases more than a temperature of the first region during an operation of the first electronic component, and wherein at least a portion of the second region is connected with the first metal pattern using a joining portion. 5 . The circuit board of claim 2 , wherein the first electronic component is mounted on the upper portion of the circuit board and at least a portion of the first thermally conductive structure is positioned as a vertically downward region from the first electronic component. 6 . The circuit board of claim 5 , wherein at least a portion of the electronic device is positioned in a vertically downward region from the first electronic component. 7 . The circuit board of claim 1 , further comprising: an adhesion improving portion on the surface of the first thermally conductive structure configured to increase adhesion between the first thermally conductive structure and the insulating part. 8 . The circuit board of claim 7 , wherein the adhesion improving portion comprises a primer comprising acrylic silane. 9 . The circuit board of claim 1 , further comprising: a first via comprising a surface in contact with an upper surface of the first thermally conductive structure; a first metal pattern configured to be in contact with another surface of the first via; a second via comprising a surface in contact with a lower surface of the first thermally conductive structure; a second metal pattern configured to be in contact with another surface of the second via; a third via comprising a surface in contact with an upper surface of the electronic device; a third metal pattern configured to be in contact with another surface of the third via; a fourth via comprising a surface in contact with a lower surface of the electronic device; and a fourth metal pattern configured to be in contact with another surface of the fourth via, wherein the first thermally conductive structure comprises a hexahedron form with the upper surface and the lower surface thereof. 10 . The circuit board of claim 9 , wherein a first joining portion is in contact with the first metal pattern and the first electronic component is in contact with the first joining portion. 11 . The circuit board of claim 10 , wherein a second joining portion is in contact with the second metal pattern and an additive substrate is in contact with the second joining portion, and wherein heat generated from the first electronic component is transmitted to the additive substrate through the first joining portion, the first metal pattern, the first via, the first thermally conductive structure, the second via, the second metal pattern, and the second joining portion. 12 . The circuit board of claim 11 , wherein the second joining portion is operatively connected on the upper surface of a heat sink, wherein the upper surface and the lower surface of the heat sink are exposed through the additive substrate, and wherein the additive substrate comprises a thermally conductive material. 13 . The circuit board of claim 11 , wherein the first electronic component comprises a first region and a second region of which clock speed is greater than that of the first region, wherein a distance from the second region to the first joining portion is shorter than that from the first region to the first joining portion. 14 . A circuit board, comprising: a first thermally conductive structure comprising a cavity or a recess portion, wherein at least a portion of the first thermally conductive structure is inserted into an insulating part, a first structure layer comprising a via hole, and a second structure layer integrated on an upper surface of the first structure layer and a lower surface of the first structure layer by filling a material inside the via hole. 15 . The circuit board of claim 14 , wherein the first structure layer comprises invar and the second structure layer comprises copper. 16 . The circuit board of claim 14 , wherein the first structure layer comprises graphite or graphene. 17 . A circuit board, comprising: a first insulating layer comprising a first cavity; a first thermally conductive structure comprising a second cavity, wherein a portion of the second cavity is inserted into the first cavity; an electronic device comprising a portion inserted into the second cavity; a second insulating layer configured to cover an upper portion of the first insulating layer, the first thermally conductive structure, and the electronic device; a third insulating layer configured to cover a lower portion of the first insulating layer, the first thermally conductive structure, and the electronic device; a first via comprising an end in contact with the first thermally conductive structure by passing through the second insulating layer; a second via comprising an end in contact with the first thermally conductive structure by passing through the third insulating layer; a third via comprising an end in contact with the electronic device by passing through the second insulating layer; and a fourth via comprising an end in contact with the electronic device by passing through the third insulating layer. 18 . The circuit board of claim 17 , wherein a first electronic component is formed on the upper portion of the circuit board and at least a portion of the electronic device is positioned at a vertically downward region of the first electronic component. 19 . The circuit board of claim 18 , wherein the electronic device is a decoupling capacitor and the third via is operatively connected to a power source terminal of the first electronic component. 20 . The circuit board of claim 18 , wherein the first electronic component comprises a first region and a second region, wherein a temperature in the second region is higher than a temperature of the first region during an operation of the first electronic component, and wherein a metal pattern is in contact with a joining portion, which is in contact with at least a portion of the second region, and is in contact with another end of the first via.
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