Semiconductor package and semiconductor device including the same

Patent metadata

Field	Value
Publication number	US-2016133605-A1
Application number	US-201514938788-A
Country	US
Kind code	A1
Filing date	Nov 11, 2015
Priority date	Nov 11, 2014
Publication date	May 12, 2016
Grant date	—

Abstract

A semiconductor device includes a substrate, a first semiconductor package disposed on the substrate, and a second semiconductor package spaced apart from the first semiconductor package on the substrate. The second semiconductor package includes a semiconductor chip stacked on the substrate, an adhesion part covering the semiconductor chip, and a heat-blocking structure disposed between the substrate and the semiconductor chip. Heat generated from the first semiconductor package and transmitted to the second semiconductor package through the substrate is blocked by the heat-blocking structure.

First claim

What is claimed is:

1 . A semiconductor device comprising:
a substrate; a first semiconductor package disposed on the substrate; and a second semiconductor package spaced apart from the first semiconductor package on the substrate, wherein the second semiconductor package comprises: a semiconductor chip stacked on the substrate; an adhesion part covering the semiconductor chip; and a heat-blocking structure disposed between the substrate and the semiconductor chip, wherein heat generated from the first semiconductor package and transmitted to the second semiconductor package through the substrate is blocked by the heat-blocking structure.

2 . The semiconductor device of claim 1 , wherein the adhesion part comprises: a first adhesion portion under the semiconductor chip; and a second adhesion portion above the semiconductor chip,
wherein the heat-blocking structure is the first adhesion portion, and wherein the first adhesion portion includes voids in a first region of the second semiconductor package which is adjacent to the first semiconductor package.

3 . The semiconductor device of claim 2 , wherein the first adhesion portion includes the voids wherein a volume the voids is greater in the first region than in a second region of the second semiconductor package which is disposed opposite the first region and away from the first semiconductor package.

4 . The semiconductor device of claim 3 , wherein the second semiconductor package further comprises: a second semiconductor chip stacked on the semiconductor chip with the second adhesion portion interposed therebetween,
wherein the second adhesion portion includes voids in the first region adjacent to the first semiconductor package.

5 . The semiconductor device of claim 4 , wherein the voids of the second adhesion portion has a volume greater in the first region than that in the second region.

6 . The semiconductor device of claim 3 , wherein a volume of the voids is equal to about a quarter of a volume of the first adhesion portion.

7 . The semiconductor device of claim 1 , wherein the heat-blocking structure includes Teflon.

8 . The semiconductor device of claim 1 , further comprising:
a third semiconductor package on the substrate, wherein the second semiconductor package is disposed at a side of the first semiconductor package, wherein the third semiconductor package is disposed at another side of the first semiconductor package, wherein the second and third semiconductor packages are spaced apart from the first semiconductor package, and wherein the third semiconductor package has the same structure as the second semiconductor package.

9 . A semiconductor package comprising:
a substrate; a plurality of semiconductor chips stacked on the substrate, the plurality of semiconductor chips including a first semiconductor chip nearest to the substrate; an adhesion part covering the semiconductor chips; and a heat-blocking structure disposed between the substrate and the first semiconductor chip.

10 . The semiconductor package of claim 9 , wherein the heat-blocking structure is a first adhesion portion of the adhesion part, and
the first adhesion portion includes voids in a first region adjacent to one edge of the first semiconductor chip.

11 . The semiconductor package of claim 10 , wherein the first adhesion portion further includes voids in a second region adjacent to another edge of the first semiconductor chip and a volume of the voids in the first region is greater than a volume of the voids in the second region.

12 . The semiconductor package of claim 11 , wherein the plurality of semiconductor chips includes: a second semiconductor chip stacked on the first semiconductor chip with a second adhesion portion of the adhesion part interposed therebetween, and
wherein the second adhesion portion includes voids in the first region.

13 . The semiconductor package of claim 12 , wherein the second adhesion portion further includes voids in the second region wherein a volume of the voids of the second adhesion portion in the first region is greater than a volume the voids in the second region.

14 . A semiconductor device, comprising
a substrate; a first semiconductor package disposed on the substrate; a second semiconductor package disposed on the substrate and spaced apart from the first semiconductor package wherein the second semiconductor package has a first region at an edge portion which is adjacent to the first semiconductor package; wherein the second semiconductor package comprises a first semiconductor chip stacked on the substrate, an adhesion part covering the first semiconductor chip, a heat-blocking structure consisting of a substance with a heat conductivity less than that of the substrate wherein the heat-blocking structure is disposed between the first semiconductor chip and the substrate to block heat generated from the first semiconductor package and transmitted to the substrate.

15 . The semiconductor device of claim 14 , wherein the heat-blocking structure includes an adhesion portion of the adhesion part having voids filled with air.

16 . The semiconductor device of claim 14 , wherein the heat-blocking structure includes a Teflon layer covering a bottom surface of the first semiconductor chip.

17 . The semiconductor device of claim 16 , further comprising an adhesion portion of the adhesion part disposed between the bottom surface of the first semiconductor chip and the Teflon layer and the adhesion portion includes voids filled with air.

18 . The semiconductor device of claim 17 , wherein the voids in the adhesion portion are distributed from the first region to a second region at an opposite edge portion of the second semiconductor package.

19 . The semiconductor device of claim 17 , wherein the voids in the adhesion portion are distributed in a portion corresponding to the first region.

20 . The semiconductor device of claim 14 , wherein the second semiconductor package includes a second semiconductor chip stacked on the first semiconductor chip, the heat-blocking structure includes a Teflon layer covering the bottom surface of the first semiconductor chip and an adhesion portion disposed between the second semi-conductor chip and the first semiconductor chip wherein the adhesion portion includes voids.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Bae Jin-Kwon
• Kim Jae Choon
• Kim Jichul
• Park Kyol
• Jo Chajea

Classifications

• H10W90/734

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/732

  between stacked chips · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/722

  between stacked chips · CPC title

• H10W90/701

  characterised by the relative positions of pads or connectors relative to package parts · CPC title