Assembling devices for probe card testing

US2016131702A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016131702-A1
Application numberUS-201414536928-A
CountryUS
Kind codeA1
Filing dateNov 10, 2014
Priority dateNov 10, 2014
Publication dateMay 12, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An example process places dice that have been cut from a first semiconductor wafer on a second wafer. The example process includes arranging the dice in a pattern on a the second wafer, where the second wafer has a coefficient of thermal expansion that has substantially a same coefficient of thermal expansion as the dice; and using a probe card that is matched to a pattern of dice in connection with the second wafer.

First claim

Opening claim text (preview).

What is claimed is: 1 - 12 . (canceled) 13 . Automatic test equipment (ATE) comprising: a probe card configured to contact, for testing, dice that have been cut from a first semiconductor wafer, the dice being on a second wafer; and a processing device to execute instructions to control testing performed by the probe card; wherein the second wafer has a coefficient of thermal expansion that has substantially a same coefficient of thermal expansion as the dice. 14 . The ATE of claim 13 , further comprising an adhesive between the second wafer and the dice, the adhesive holding the dice on the second wafer. 15 . The ATE of claim 13 , wherein the adhesive has a composition that causes the adhesive to decrease in adhesiveness in response to heat. 16 . The ATE of claim 13 , wherein the adhesive has a composition that causes the adhesive to decrease in adhesiveness in response to ultraviolet light. 17 . The ATE of claim 13 , wherein a material of which the second wafer is formed comprises silicon having a coefficient of thermal expansion that matches a coefficient of thermal expansion of the dice or that is within a predefined range around the coefficient of thermal expansion of dice. 18 . The ATE of claim 13 , wherein the second wafer comprises glass on which an adhesive is disposed, and the adhesive has a composition that causes the adhesive to decrease in adhesiveness in response to ultraviolet light. 19 . The ATE of claim 13 , wherein the dice were in a same pattern in the first semiconductor wafer as the dice are arranged on the second wafer. 20 . The ATE of claim 13 , wherein the dice were in a first pattern in the first semiconductor wafer and the dice are in a second pattern on the second wafer, the first pattern being different from the second pattern. 21 . The ATE of claim 20 , wherein, in the second pattern, adjacent dice are farther apart than in the first pattern. 22 . The ATE of claim 13 , wherein the first semiconductor wafer was round and the second wafer has a shape that is other than round. 23 . The ATE of claim 13 , wherein the first semiconductor wafer or the second wafer has a shape that is other than round. 24 . The ATE of claim 13 , wherein the probe card is matched to a pattern of dice on the second wafer.

Assignees

Inventors

Classifications

  • Package configurations · CPC title

  • Thermally treating (reflowing H10W72/01357) · CPC title

  • Connecting techniques · CPC title

  • of die-attach connectors · CPC title

  • Automated test systems [ATE]; using microprocessors or computers (G01R31/317 takes precedence; ATE for detection of defective computer hardware G06F11/2736) · CPC title

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Frequently asked questions

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What does patent US2016131702A1 cover?
An example process places dice that have been cut from a first semiconductor wafer on a second wafer. The example process includes arranging the dice in a pattern on a the second wafer, where the second wafer has a coefficient of thermal expansion that has substantially a same coefficient of thermal expansion as the dice; and using a probe card that is matched to a pattern of dice in connection…
Who is the assignee on this patent?
Teradyne Inc
What technology area does this patent fall under?
Primary CPC classification G01R31/2834. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu May 12 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).