Graphene as a Ge Surface Passivation Layer to Control Metal-Semiconductor Junction Resistivity
US-2015179743-A1 · Jun 25, 2015 · US
US2016111180A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2016111180-A1 |
| Application number | US-201514714902-A |
| Country | US |
| Kind code | A1 |
| Filing date | May 18, 2015 |
| Priority date | Oct 16, 2014 |
| Publication date | Apr 21, 2016 |
| Grant date | — |
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A method of forming an amorphous carbon monolayer (ACM) and an electronic device including the ACM are provided. The method includes forming the ACM on a surface of a germanium (Ge) substrate via a chemical vapor deposition (CVD) process. The CVD process includes injecting a reaction gas including carbon-containing gas and hydrogen (H 2 ) gas in to a reaction chamber containing the Ge substrate, wherein a partial pressure of the H 2 gas in the reaction chamber may range from 1 Torr to 30 Torr.
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What is claimed is: 1 . A method of forming an amorphous carbon monolayer (ACM), the method comprising forming the ACM on a surface of a germanium (Ge) substrate via chemical vapor deposition (CVD) process, wherein the CVD process comprises injecting a reaction gas comprising carbon-containing gas and hydrogen (H 2 ) gas into a reaction chamber containing the Ge substrate, and wherein a partial pressure of the H 2 gas in the reaction chamber is in the range of from 1 Torr to 30 Torr. 2 . The method of claim 1 , wherein a volume ratio of the carbon-containing gas to the H 2 gas is at least 0.05. 3 . The method of claim 2 , wherein a processing temperature in the reaction chamber is in the range of from 850° C. to 937° C. 4 . The method of claim 1 , wherein inert gas is injected into the reaction chamber in addition to the carbon-containing gas and the H 2 gas. 5 . The method of claim 1 , wherein the Ge substrate is provided on a supporting substrate. 6 . The method of claim 5 , wherein the supporting substrate comprises a silicon (Si) wafer. 7 . The method of claim 5 , wherein the supporting substrate comprises SiO 2 , Al 2 O 3 , GaN, quartz, or Ge oxide. 8 . The method of claim 5 , wherein the Ge substrate is provided on the supporting substrate by CVD, PVD or wafer bonding. 9 . The method of claim 1 , wherein in the ACM, a ratio of sp 3 -bonded carbon atoms to sp 2 -bonded carbon atoms is 0.2 or less. 10 . A transistor device comprising: a substrate; an amorphous carbon monolayer (ACM) provided on the substrate; a source electrode and a drain electrode provided on respective sides of the ACM on the substrate; an insulating layer provided on the ACM; and a gate electrode provided on the insulating layer. 11 . The transistor device of claim 10 , wherein the ACM is a channel layer. 12 . The transistor device of claim 10 , wherein a channel layer is provided between the substrate and the ACM. 13 . The transistor device of claim 12 , wherein the channel layer comprises graphene. 14 . The transistor device of claim 13 , wherein the ACM and the insulating layer form a gate insulating layer. 15 . The transistor device of claim 10 , wherein a surface of the substrate is coated by an insulating material. 16 . A gas sensor comprising: first and second electrodes that are spaced apart; and an amorphous carbon monolayer (ACM) that connects the first and second electrodes and is configured to function as a gas adsorption plate for a certain type of gas. 17 . The gas sensor of claim 16 , wherein the ACM is configured to be heated by applying a current to the first and second electrodes to remove gas that is adsorbed on the ACM is removed. 18 . A transparent electrode structure comprising: a substrate; at least one amorphous carbon monolayer (ACM) provided on the substrate; and at least one graphene layer provided on the substrate. 19 . The transparent electrode structure of claim 18 , wherein the at least one ACM and the at least one graphene layer are sequentially stacked in that order on the substrate or the at least one graphene layer and the at least one ACM are sequentially stacked in that order on the substrate. 20 . The transparent electrode structure of claim 18 , wherein the at least one ACM is stacked between a plurality of graphene layers or the at least one graphene layer is stacked between a plurality of ACMs. 21 . The transparent electrode structure of claim 18 , wherein the at least one ACM and the at least one graphene layer are alternately stacked. 22 . A method of improving the electrical conductivity of a structure containing a graphene layer on a substrate, the method comprising either (1) forming at least one amorphous carbon monolayer (ACM) between the substrate and the graphene layer; or (2) forming at least one amorphous carbon monolayer (ACM) on the side of the graphene layer furthest from substrate. 23 . The method of claim 22 , wherein the at least one ACM is formed via chemical vapor deposition (CVD) during which a reaction gas injected into a reaction chamber, wherein the reaction gas comprises carbon-containing gas and hydrogen (H 2 ) gas, and a partial pressure of the H 2 gas in the reaction chamber is in the range of from 1 Torr to 30 Torr. 24 . The method of claim 23 , wherein a volume ratio of the carbon-containing gas to the H 2 gas is at least 0.05. 25 . The method of claim 24 , wherein a processing temperature in the reaction chamber is in the range of from 850° C. to 937° C. 26 . The method of claim 23 , wherein inert gas is injected into the reaction chamber in addition to the carbon-containing gas and the H 2 gas. 27 . The method of claim 23 , wherein the Ge substrate is provided on a supporting substrate. 28 . The method of claim 27 , wherein the supporting substrate comprises a silicon (Si) wafer. 29 . The method of claim 27 , wherein the supporting substrate comprises SiO 2 , Al 2 O 3 , GaN, quartz, or Ge oxide. 30 . The method of claim 23 , wherein in the ACM, a ratio of sp 3 -bonded carbon atoms to sp 2 -bonded carbon atoms is 0.2 or less. 31 . The transistor device of claim 13 , wherein the transistor device exhibits electrical conductivity greater than a sum of electrical conductivities of the individual ACM and channel layers. 32 . The transparent electrode structure of claim 18 , wherein the transparent electrode structure exhibits electrical conductivity greater than a sum of electrical conductivities of the at least one ACM and the at least one graphene layers.
Graphene · CPC title
characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715) · CPC title
Group IV materials, e.g. germanium or silicon carbide (TFTs having oxide semiconductors H10D30/6755) · CPC title
of thin-film transistors [TFT] · CPC title
Electricity · mapped topic
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