Etching method

US2016049314A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016049314-A1
Application numberUS-201414779670-A
CountryUS
Kind codeA1
Filing dateApr 22, 2014
Priority dateApr 26, 2013
Publication dateFeb 18, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An etching method for etching an object to be processed in a processing chamber including a first electrode and a second electrode disposed facing the first electrode and configured to receive the object to be processed thereon is provided that includes steps of intermittently supplying first high frequency power to either the first electrode or the second electrode while supplying second high frequency power lower than the first high frequency power to the second electrode, supplying a process gas containing hydrogen bromide HBr and oxygen O 2 into the processing chamber, and etching a poly silicon film deposited on the object to be processed into a mask pattern of a silicon-containing oxide film patterned by a spacer double patterning method by plasma generated from the process gas.

First claim

Opening claim text (preview).

1 . An etching method for etching an object to be processed in a processing chamber including a first electrode and a second electrode disposed facing the first electrode and configured to receive the object to be processed thereon, comprising steps of: intermittently supplying first high frequency power to either the first electrode or the second electrode while supplying second high frequency power lower than the first high frequency power to the second electrode; supplying a process gas containing hydrogen bromide HBr and oxygen O 2 into the processing chamber; and etching a poly silicon film deposited on the object to be processed into a mask pattern of a silicon-containing oxide film patterned by a spacer double patterning method by plasma generated from the process gas. 2 . The etching method as claimed in claim 1 , wherein the step of etching includes a main etching step of etching the poly silicon film into the mask pattern of the silicon-containing oxide film by the plasma generated from the process gas, and an over etching step of further etching the poly silicon film into the mask pattern of the silicon-containing oxide film after the main etching step, wherein the first high frequency power is intermittently supplied in the main etching step and the over etching step. 3 . The etching method as claimed in claim 1 , wherein the step of etching includes a main etching step of etching the poly silicon film into the mask pattern of the silicon-containing oxide film by the plasma generated from the process gas, and an over etching step of further etching the poly silicon film into the mask pattern of the silicon-containing oxide film after the main etching step, wherein the first high frequency power is continuously supplied in the main etching step, and the first high frequency power is intermittently supplied in the over etching step. 4 . The etching method as claimed in claim 2 , wherein among each of the main etching step and the over etching step, in the step of intermittently supplying the first high frequency power, the supplied process gas further contains any one of chloride Cl 2 , fluoromethane CH 3 F and fluoroform CHF 3 . 5 . The etching method as claimed in claim 1 , wherein a percentage of a flow rate of oxygen O 2 to a total flow rate of hydrogen bromide HBr and oxygen O 2 contained in the process gas is in a range of 0.3% to 5%.

Assignees

Inventors

Classifications

  • characterised by the processes involved to create the masks · CPC title

  • pre- or post-treatments, e.g. anti-corrosion processes · CPC title

  • using masks for conductive or resistive materials · CPC title

  • of highly doped semiconductor materials, e.g. polysilicon layers or amorphous silicon layers · CPC title

  • H10P50/268Primary

    of silicon-containing layers · CPC title

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What does patent US2016049314A1 cover?
An etching method for etching an object to be processed in a processing chamber including a first electrode and a second electrode disposed facing the first electrode and configured to receive the object to be processed thereon is provided that includes steps of intermittently supplying first high frequency power to either the first electrode or the second electrode while supplying second high …
Who is the assignee on this patent?
Tokyo Electron Ltd
What technology area does this patent fall under?
Primary CPC classification H10P50/268. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Feb 18 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).