Magnetic memory devices

Patent metadata

Field	Value
Publication number	US-2016043136-A1
Application number	US-201514677101-A
Country	US
Kind code	A1
Filing date	Apr 2, 2015
Priority date	Aug 8, 2014
Publication date	Feb 11, 2016
Grant date	—

Abstract

A magnetic memory device is provided. The magnetic memory device includes a substrate including a first source/drain region and a second source/drain region; a word line structure between the first and source/drain regions and extending in a first direction; a buried contact electrically connected to the first source/drain region and on the first source/drain region; a contact pad electrically connected to the buried contact and on the buried contact; and a memory portion electrically connected to the contact pad and on the contact pad, the contact pad including a metal silicide layer.

First claim

What is claimed is:

1 . A magnetic memory device, comprising:
a substrate including a first source/drain region and a second source/drain region; a word line structure disposed between the first and second source/drain regions and extending in a first direction; a buried contact electrically connected to the first source/drain region and disposed on the first source/drain region; a contact pad electrically connected to the buried contact and disposed on the buried contact, the contact pad including a metal silicide layer; and a memory portion electrically connected to the contact pad and disposed on the contact pad.

2 . The magnetic memory device as claimed in claim 1 , wherein the metal silicide layer includes one or more of a cobalt silicide layer, a titanium silicide layer, a tantalum silicide layer, a tungsten silicide layer, a nickel silicide layer, or a platinum silicide layer.

3 . The magnetic memory device as claimed in claim 1 , wherein a width of the metal silicide layer in a second direction perpendicular to the first direction is greater than a width of the buried contact in the second direction.

4 . The magnetic memory device as claimed in claim 1 , wherein:
the memory portion includes a bottom electrode, a magnetic tunnel junction element, and a top electrode, which are sequentially stacked; and the magnetic tunnel junction element includes a pinned layer, a tunnel barrier layer, and a free layer.

5 . The magnetic memory device as claimed in claim 1 , wherein the buried contact includes a polysilicon material.

6 . The magnetic memory device as claimed in claim 1 , wherein the contact pad further includes a polysilicon pad.

7 . The magnetic memory device as claimed in claim 6 , wherein the polysilicon pad contacts the buried contact, and the metal silicide layer contacts the memory portion.

8 . The magnetic memory device as claimed in claim 7 , wherein a width of the polysilicon pad in a second direction perpendicular to the first direction is substantially equal to a width of the metal silicide layer in the second direction.

9 . The magnetic memory device as claimed in claim 1 , wherein the contact pad further includes a metal pad.

10 . The magnetic memory device as claimed in claim 9 , wherein the metal silicide layer contacts the buried contact, and the metal pad contacts the memory portion.

11 . The magnetic memory device as claimed in claim 1 , further comprising a source line structure electrically connected to the second source/drain region and extending in the first direction,
wherein the source line structure includes a source line contact contacting the second source/drain region, a source metal silicide layer on the source line contact, and a source line on the source metal silicide layer.

12 . A magnetic memory device, comprising:
a substrate including an active region defined by an isolation layer; a first source/drain region and a second source/drain region in the active region; a word line structure disposed between the first and source/drain regions and extending in a first direction; a buried contact disposed on the first source/drain region and electrically connected to the first source/drain region, the buried contact including a polysilicon material; a contact pad disposed on the buried contact and electrically connected to the buried contact, the contact pad including a polysilicon pad and a first metal silicide layer, which are sequentially stacked; a memory portion disposed on the first metal silicide layer and electrically connected to the contact pad; a source line structure disposed on the second source/drain region and electrically connected to the second source/drain region; and a bit line extending in a second direction perpendicular to the first direction and electrically connected to the memory portion.

13 . The magnetic memory device as claimed in claim 12 , wherein a width of the polysilicon pad in the second direction is substantially equal to a width of the first metal silicide layer in the second direction.

14 . The magnetic memory device as claimed in claim 12 , wherein:
the source line structure includes a source line contact contacting the second source/drain region, a second metal silicide layer on the source line contact, and a source line on the second metal silicide layer; and a width of the first metal silicide layer in the second direction is greater than a width of the second metal silicide layer in the second direction.

15 . The magnetic memory device as claimed in claim 12 , wherein:
the memory portion includes a bottom electrode, a magnetic tunnel junction element, and a top electrode, which are sequentially stacked; and the magnetic tunnel junction element includes a pinned layer, a tunnel barrier layer, and a free layer.

16 . The magnetic memory device as claimed in claim 12 , further comprising an insulation layer being at a lower level than the memory portion and covering a sidewall of the contact pad,
wherein the insulation layer includes an overlap region that vertically overlaps an edge of the memory portion and a non-overlap region that does not vertically overlap the memory portion, and wherein the non-overlap region of the insulation layer has a top surface at lower level than a top surface of the overlap region.

17 . A magnetic memory device, comprising:
a substrate including a first source/drain region and a second source/drain region; a word line structure disposed between the first and source/drain regions and extending in a first direction; a buried contact electrically connected to the first source/drain region and diposed on the first source/drain region, an upper width of the buried contact in a second direction perpendicular to the first direction being greater than a lower width of the buried contact in the second direction; a contact pad electrically connected to the buried contact and disposed on the buried contact, the contact pad including the metal silicide layer; and a memory portion electrically connected to the contact pad and disposed on the contact pad.

18 . The magnetic memory device as claimed in claim 17 , wherein the buried contact has a sloped sidewall.

19 . The magnetic memory device as claimed in claim 17 , wherein the contacts pad further includes a polysilicon pad contacting the metal silicide layer and the metal silicide layer contacts the memory portion.

20 . The magnetic memory device as claimed in claim 17 , wherein:
the contact pad further includes a metal pad contacting the metal silicide layer; the metal silicide layer is between the metal pad and the buried contact; and a width of the metal silicide layer in the second direction is substantially equal to the upper width of the buried contact in the second direction.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Kim Sung-In
• Lee Jae-Kyu

Classifications

• H10W20/20

  Interconnections within wafers or substrates, e.g. through-silicon vias [TSV] · CPC title

• H01L27/228 Primary

  Electricity · mapped topic

• H01L23/535

  Electricity · mapped topic

• H10B61/22 Primary

  of the field-effect transistor [FET] type · CPC title