Semiconductor structure with template for transition metal dichalcogenides channel material growth

Patent metadata

Field	Value
Publication number	US-2016013277-A1
Application number	US-201414326575-A
Country	US
Kind code	A1
Filing date	Jul 9, 2014
Priority date	Jul 9, 2014
Publication date	Jan 14, 2016
Grant date	—

Abstract

Disclosed is a semiconductor structure comprising a single crystal substrate, a channel layer formed above the substrate from a transition metal dichalcogenides (TMDC) material, and a single crystal epitaxial buffer layer formed between the substrate and the channel layer, wherein the buffer layer is formed from material having a lattice constant mismatch of less than 5% with the lattice constant of the channel layer material. Also, disclosed is a method of forming a semiconductor structure comprising selecting a substrate formed from a single crystal material, preparing the substrate for template growth, growing a template on the substrate wherein the template is formed from single crystal material, and growing channel material on the template wherein the channel material is formed from a TMDC material and wherein the buffer layer material has a lattice constant mismatch of less than 5% with the lattice constant of the channel layer material.

First claim

1 - 7 . (canceled)

8 . A method of forming a semiconductor structure comprising:
selecting a substrate, the substrate formed from a single crystal material; preparing the substrate for template growth; growing a template as a buffer layer on the substrate, the buffer layer being formed from a single crystal material; and growing channel material on the template, the channel material formed from a transition metal dichalcogenides (TMDC) material, wherein the buffer layer material has a lattice constant mismatch of less than 5% with the lattice constant of the channel layer material.

9 . The method of claim 8 , wherein the preparing the substrate for template growth comprises pre-treating the substrate with hydrogen gas in a vacuum at high temperature.

10 . The method of claim 8 , wherein the preparing the substrate for template growth comprises loading the substrate into a vacuum chamber and pre-treating the substrate with a H 2 purge at 800-1000° C.

11 . The method of claim 8 , wherein the preparing the substrate for template growth comprises loading the substrate into a metal organic chemical vapor deposition (MOCVD) vacuum chamber and pre-treating the substrate with a hydrogen gas flow at a temperature of approximately 950° C.

12 . The method of claim 8 , wherein the growing a template as a buffer layer comprises growing the buffer layer selectively by MOCVD, sputtering, and pulsed laser deposition.

13 . The method of claim 8 , wherein the growing a template as a buffer layer comprises growing the buffer layer by MOCVD at a temperature of around 900-1000° C.

14 . The method of claim 8 , wherein the growing a template as a buffer layer comprises performing a sulfurization process to form a sulfur termination on a surface of the buffer layer.

15 . The method of claim 14 , wherein the performing a sulfurization process comprises pretreatment selectively using H 2 S gas and Sulfur vapor ambient.

16 . The method of claim 14 , wherein the performing a sulfurization process comprises pretreatment at a temperature of around 500˜1000° C.

17 - 20 . (canceled)

21 . A method of forming a structure, comprising:
providing a substrate; integrating a two-dimensional layered channel material onto the substrate by:
epitaxially depositing a buffer layer on a surface of the substrate; and
epitaxially depositing the two dimensional layered channel material over the substrate on the buffer layer,
wherein a lattice constant mismatch between the buffer layer and the two dimensional layered channel material is less than 5%.

22 . The method of claim 21 , wherein providing the substrate comprises providing a substrate comprising a single crystal material, wherein providing the substrate includes selectively providing a substrate comprising Si(111), 4H—SiC(0001), sapphire(0001), and AlN(0001).

23 . The method of claim 21 , further comprises performing a substrate cleaning process before epitaxially-depositing the buffer layer.

24 . The method of claim 23 , wherein the cleaning process includes cleaning the substrate in hot Acetone twice and follow by cleaning in hot iso-Propyl alcohol.

25 . The method of claim 21 , further comprises performing a substrate pre-treatment process before epitaxially depositing the buffer layer, wherein the pre-treatment process includes heating the substrate in a substantially vacuum environment at about 800 to about 1000° C.

26 . The method of claim 21 , wherein epitaxially depositing the buffer layer includes growing a buffer layer comprising a single crystal material.

27 . The method of claim 26 , wherein epitaxially depositing the buffer layer includes growing a single crystal material layer that comprises c-plane AlN single crystal layer to a thickness from about 2 to about 200 nm.

28 . The method of claim 29 , wherein epitaxially depositing the buffer layer selectively includes performing epitaxial deposition using metal organic chemical vapor deposition (MOCVD), sputtering, and pulsed laser deposition.

29 . The method of claim 21 , wherein epitaxially depositing the two dimensional layered channel material includes growing a transitional metal dichalcogenide (TMDC) material layer on the buffer layer.

30 . The method of claim 29 , wherein growing the TMDC material layer including performing pulse laser deposition of TMDC material at an elevated temperature of about 500 to about 900° C. with laser energy density of about 1 to about 5 J/cm 2 .

31 . A method of fabricating high mobility 2D channel device, comprising:
providing a single crystal substrate having a source and a drain region defined thereon; integrating a two-dimensional layered channel material onto the substrate by:
epitaxially depositing a buffer layer on a surface of the substrate between the source and the drain regions; and
epitaxially depositing the two dimensional layered channel structure comprising transitional metal dichalcogenide material over the substrate on the buffer layer between the source and the drain regions,
wherein a lattice constant mismatch between the buffer layer and the two dimensional layered channel material is less than 5%.

Assignees

• Taiwan Semiconductor Mfg
• Univ Nat Chiao Tung

Inventors

• Ho Yen-Teng
• Chang Yi

Classifications

• H10P32/17

  characterised by the semiconductor material · CPC title

• H10P32/12

  between a solid phase and a gaseous phase · CPC title

• H10P14/3602

  In-situ cleaning · CPC title

• H10P14/3436

  being chalcogenide semiconductor materials not being oxides, e.g. ternary compounds · CPC title

• H10P14/3216

  Nitrides · CPC title