Electronic device module and method of manufacturing the same

Patent metadata

Field	Value
Publication number	US-2016007463-A1
Application number	US-201514732550-A
Country	US
Kind code	A1
Filing date	Jun 5, 2015
Priority date	Jul 4, 2014
Publication date	Jan 7, 2016
Grant date	—

Abstract

An electronic device module includes: a board including at least one mounting electrode and at least one external connection electrode and having a protective insulation layer which is provided on an outer surface thereof; at least one electronic device mounted on the mounting electrodes; a molded part sealing the electronic device; and at least one connective conductor of which one end is bonded to the external connection electrode of the board and which penetrates through the molded part to be disposed in the molded part, wherein the protective insulation layer is disposed to be spaced apart from the connective conductor.

First claim

What is claimed is:

1 . An electronic device module comprising:
a board including at least one mounting electrode and at least one external connection electrode and having a protective insulation layer on an outer surface of the board; at least one electronic device mounted on the mounting electrode; a molded part sealing the electronic device; and at least one connective conductor of which one end is bonded to the external connection electrode of the board and which penetrates through the molded part to be disposed in the molded part, wherein the protective insulation layer is spaced apart from the connective conductor.

2 . The electronic device module of claim 1 , wherein the molded part is interposed between the protective insulation layer and the connective conductor.

3 . The electronic device module of claim 1 , wherein the protective insulation layer covers a portion of the external connection electrode.

4 . The electronic device module of claim 1 , wherein the protective insulation layer is spaced apart from the external connection electrode.

5 . The electronic device module of claim 1 , wherein a portion of the molded part is bonded to the external connection electrode.

6 . The electronic device module of claim 5 , wherein an insulation film is interposed between the molded part and the external connection electrode.

7 . The electronic device module of claim 1 , wherein the molded part is formed of an epoxy molding compound (EMC).

8 . The electronic device module of claim 1 , further comprising at least one external terminal coupled to the other end of the connective conductor.

9 . A method of manufacturing an electronic device module, comprising:
preparing a board including at least one mounting electrode and at least one external connection electrode and having a protective insulation layer formed on an outer surface of the board; mounting at least one electronic device on the mounting electrode; forming a molded part sealing the electronic device; forming at least one via hole in the molded part without exposing the protective insulation layer; and forming at least one connective conductor in the via hole by using a plating method.

10 . The method of claim 9 , wherein the step of mounting the at least one electronic device includes mounting a plurality of electronic devices on both surfaces of the board.

11 . The method of claim 9 , wherein the molded part is formed on both surfaces of the board.

12 . The method of claim 9 , wherein the step of forming the at least one via hole includes increasing a level of roughness of an inner surface of the via hole using laser processing.

13 . The method of claim 9 , wherein the molded part is formed using an EMC, and
the connective conductor is formed through a copper plating.

14 . The method of claim 9 , further comprising forming at least one external terminal on the connective conductor.

15 . The method of claim 9 , wherein the board is prepared to form plating wirings on at least one surface thereof, and
the connective conductor is formed through electroplating.

16 . The method of claim 9 , wherein the preparing of the board includes:
forming the mounting electrode and the external connection electrode; and forming the protective insulation layer while partially or entirely exposing the external connection electrode.

17 . The method of claim 16 , wherein the protective insulation layer is formed on the external connection electrode while having at least one groove partially exposing the external connection electrode.

18 . The method of claim 17 , wherein the groove has a ring shape or an opening shape.

19 . The method of claim 17 , wherein the step of forming the via hole includes exposing an area of the external connection electrode which is smaller than an area of the groove formed in the protective insulation layer.

Assignees

• Samsung Electro Mech

Inventors

• Yoo Do Jae
• Lim Jae Hyun
• Ryu Jong In
• Oh Kyu Hwan
• Lee Ki Ju

Classifications

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W74/114

  by a substrate and the encapsulations · CPC title

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H10W90/00

  Package configurations · CPC title

• H05K3/4038

  Through-connections; Vertical interconnect access [VIA] connections (H05K3/403, H05K3/42 take precedence) · CPC title