Electronic package module and method for fabrication of the same
US-2024413067-A1 · Dec 12, 2024 · US
Matrix Lid Heatspreader for Flip Chip Package
US2016005682A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2016005682-A1 |
| Application number | US-201514850070-A |
| Country | US |
| Kind code | A1 |
| Filing date | Sep 10, 2015 |
| Priority date | Sep 14, 2012 |
| Publication date | Jan 7, 2016 |
| Grant date | — |
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Abstract
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A method and apparatus are provided for manufacturing a lead frame based thermally enhanced flip chip package with an exposed heat spreader lid array ( 310 ) designed for direct attachment to an array of integrated circuit die ( 306 ) by including a thermal interface adhesion layer ( 308 ) to each die ( 306 ) and encapsulating the attached heat spreader lid array ( 310 ) and array of integrated circuit die ( 306 ) with mold compound ( 321 ) except for planar upper lid surfaces of the heat spreader lids ( 312 ).
First claim
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1 - 10 . (canceled) 11 . A semiconductor package, comprising: a substrate having first and second surfaces; a die having first and second surfaces, where the first surface of the die is flip-chip bonded to the first surface of the substrate; a compressed, laterally expansive, thermally conductive interface layer formed to cover the second surface of the die; and a heat spreader lid comprising an exposed heat dissipation surface layer and a plurality of connection spa…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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- What does patent US2016005682A1 cover?
- A method and apparatus are provided for manufacturing a lead frame based thermally enhanced flip chip package with an exposed heat spreader lid array ( 310 ) designed for direct attachment to an array of integrated circuit die ( 306 ) by including a thermal interface adhesion layer ( 308 ) to each die ( 306 ) and encapsulating the attached heat spreader lid array ( 310 ) and array of integrated…
- Who is the assignee on this patent?
- Leal George R, Pham Tim V, Freescale Semiconductor Inc
- What technology area does this patent fall under?
- Primary CPC classification H10W74/014. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Thu Jan 07 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).