Methods for reducing semiconductor substrate strain variation
US-9484274-B2 · Nov 1, 2016 · US
US2016005662A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2016005662-A1 |
| Application number | US-201514736020-A |
| Country | US |
| Kind code | A1 |
| Filing date | Jun 10, 2015 |
| Priority date | Jul 2, 2014 |
| Publication date | Jan 7, 2016 |
| Grant date | — |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
Embodiments of the disclosure provide apparatus and methods for localized stress modulation for overlay and edge placement error (EPE) using electron or ion implantation. In one embodiment, a process for correcting overlay error on a substrate generally includes performing a measurement process in a metrology tool on a substrate to obtain a substrate distortion or an overlay error map, determining doping parameters to correct overlay error or substrate distortion based on the overlay error map, and providing a doping recipe to a doping apparatus based on the doping parameters determined to correct substrate distortion or overlay error. Embodiments may also provide performing a doping treatment process on the substrate using the determined doping repair recipe, for example, by comparing the overlay error map or substrate distortion with a database library stored in a computing system.
Opening claim text (preview).
1 . A method for correcting overlay error on a substrate comprising: performing a measurement process in a metrology tool on a substrate to obtain a substrate distortion map or an overlay error map; determining doping parameters to correct overlay error or substrate distortion based on the substrate distortion map or the overlay error map; and providing a doping recipe to a doping apparatus based on the doping parameters determined to correct substrate distortion or overlay error. 2 . The method of claim 1 , further comprising: performing a doping treatment process on the substrate using the determined doping repair recipe. 3 . The method of claim 1 , further comprising: determining the doping recipe by comparing the overlay error map or substrate distortion map with a database library stored in a computing system. 4 . The method of claim 3 , wherein the database library includes a correlation of a stress change in a film layer to the doping parameters. 5 . The method of claim 1 , wherein the doping parameters comprise at least one of a doping energy selection, an electron or ion selection, an ion species selection, or a doping concentration selection. 6 . The method of claim 2 , wherein the doping is performed using at least one of a plasma beam, an electron beam, a ribbon beam, or a particle beam. 7 . The method of claim 2 , wherein performing the doping treatment process on the substrate further comprises: altering a film stress locally or globally in a film layer disposed on the substrate. 8 . The method of claim 2 , wherein performing the doping treatment process on the substrate further comprises: correcting the determined overlay error or substrate distortion. 9 . The method of claim 2 , further comprising: coating a photoresist layer on the substrate and performing a lithographic exposure process after the doping treatment process. 10 . The method of claim 2 , wherein determining doping parameters for treating the substrate in a computing system further comprises: determining discrete locations of the substrate to be treated. 11 . The method of claim 1 , wherein the doping repair recipe is determined in response to one or more of film stress, substrate curvature, in plane distortion or pattern shift detected on the substrate. 12 . The method of claim 1 , wherein the substrate distortion measured on the substrate is determined by measuring a film stress of a film layer disposed on the substrate. 13 . The method of claim 1 , wherein a computing system is incorporated in the metrology tool or in the doping apparatus. 14 . The method of claim 13 , wherein the computing system is in data communication with the metrology tool or the doping apparatus. 15 . The method of claim 2 , wherein the doping treatment process is performed using ions of the same type as ions present in the substrate. 16 . The method of claim 1 , wherein the metrology tool comprises a localized stress vector mapping tool. 17 . A method for correcting overlay error on a substrate comprising: performing at least one lithographic deposition or etching process on a film layer of the substrate; determining a substrate distortion map, overlay error map, or edge placement error (EPE) introduced by the at least one lithographic deposition or etching process using a stress vector mapping tool; and implanting at least one of electrons or ions into selected discrete locations of the film layer to correct a substrate distortion, an overlay error, or the EPE. 18 . The method of claim 17 , wherein a film stress is altered to correct the substrate distortion prior to a lithography process to reduce overlay errors. 19 . The method of claim 17 , wherein the implanting is performed using at least one of a plasma beam, an electron beam, a ribbon beam, or a particle beam. 20 . A method for correcting overlay error on a substrate comprising: measuring a film stress, a substrate curvature, an in-plane distortion, or a pattern shift of a film layer disposed on a substrate; determining an overlay error map or substrate distortion map based on the measured film stress on the film layer; determining a doping repair recipe based on the measured film stress on the substrate; and doping the film layer using the determined doping repair recipe to locally change the film stress of the film layer.
characterised by multiple measurements, corrections, marking or sorting processes · CPC title
Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects · CPC title
Electricity · mapped topic
Related publications grouped by family.
Answers are generated from the same data shown on this page.