Thin film transistor and method for manufacturing the same, display substrate, and display device

Patent metadata

Field	Value
Publication number	US-12593565-B2
Application number	US-202117789284-A
Country	US
Kind code	B2
Filing date	Sep 30, 2021
Priority date	Sep 30, 2021
Publication date	Mar 31, 2026
Grant date	Mar 31, 2026

Abstract

A thin film transistor is provided. The thin film transistor is disposed on a base substrate and includes: a first active layer; a first gate disposed on a side of the first active layer; a first insulating layer disposed on a side of the first gate away from the base substrate; and a source and a drain. The first gate includes a stacked structure including: a first conductive layer; and a first barrier layer disposed on a side of the first conductive layer away from the base substrate, where a side of the first barrier layer away from the base substrate is in direct contact with a side of the first insulating layer proximate to the base substrate. The first barrier layer includes TiNx1, where 0≤x1<0.2, and x1 is a molar ratio of N to Ti.

First claim

What is claimed is:

1 . A thin film transistor, disposed on a base substrate, wherein the thin film transistor comprises:
a first active layer, disposed on a side of the base substrate; a first gate, disposed on a side of the first active layer away from the base substrate; a first insulating layer, disposed on a side of the first gate away from the base substrate; a source and a drain, disposed on a side of the first insulating layer away from the base substrate, the source and the drain being electrically connected to the first active layer, wherein the first gate comprises a stacked structure comprising: a first conductive layer; and a first barrier layer, disposed on a side of the first conductive layer away from the base substrate,
wherein a side of the first barrier layer away from the base substrate is in direct contact with a side of the first insulating layer proximate to the base substrate; and
wherein the first barrier layer comprises TiN x1 , wherein 0<x1<0.2, and x1 is a molar ratio of N to Ti;
wherein the stacked structure of the first gate further comprises: a second barrier layer, disposed between the first conductive layer and the first barrier layer, wherein the second barrier layer comprises TiN x2 , and a material of the second barrier layer has a higher N content than that of a material of the first barrier layer, wherein 0.5≤x2<0.8, and x2 is a molar ratio of N to Ti; and wherein the first barrier layer has a first grain size, the second barrier layer has a second grain size, and the first grain size is smaller than the second grain size.

2 . The thin film transistor according to claim 1 , wherein an adhesion force between a material of the first barrier layer and a material of the first insulating layer is greater than an adhesion force between a material of the second barrier layer and the material of the first insulating layer.

3 . The thin film transistor according to claim 1 , wherein a thickness of the first barrier layer is in a range of 30 nm to 150 nm; and/or,
a thickness of the second barrier layer is in a range of 30 nm to 150 nm.

4 . The thin film transistor according to claim 3 , wherein a sum of the thicknesses of the first barrier layer and the thickness of the second barrier layer is in a range of 30 nm to 150 nm.

5 . The thin film transistor according to claim 1 , wherein the stacked structure of the first gate further comprises:
a third barrier layer, disposed between the first conductive layer and the base substrate, and the third barrier layer comprising TiN x3 , wherein 0≤x3<0.2, and x3 is a molar ratio of N to Ti.

6 . The thin film transistor according to claim 1 , further comprising a second gate, wherein the second gate is disposed between the first active layer and the base substrate; and
the second gate comprises a stacked structure, and the stacked structure of the second gate is the same as the stacked structure of the first gate.

7 . The thin film transistor according to claim 1 , wherein the first conductive layer comprises an aluminum alloy material.

8 . A method for manufacturing a thin film transistor, comprising:
forming a first active layer on a base substrate; forming a first gate on a side of the first active layer away from the base substrate; forming a first insulating layer on a side of the first gate away from the base substrate; forming a source and a drain on a side of the first insulating layer away from the base substrate, the source and the drain being electrically connected to the first active layer, wherein forming the first gate comprises: forming a first conductive layer on the side of the first active layer away from the base substrate; and forming a first barrier layer on a side of the first conductive layer away from the base substrate, a side of the first barrier layer away from the base substrate being in direct contact with a side of the first insulating layer proximate to the base substrate, wherein the first barrier layer comprises TiN x1 , wherein 0≤x1<0.2, and x1 is a molar ratio of N to Ti.

9 . The method for manufacturing a thin film transistor according to claim 8 , further comprising:
forming a second gate on the base substrate before the first active layer is formed.

10 . A display substrate, comprising:
a base substrate; and a first transistor disposed on the base substrate, wherein the first transistor is the thin film transistor according to claim 1 .

11 . The display substrate according to claim 10 , further comprising a capacitor disposed on the base substrate,
wherein the capacitor comprises a first capacitor electrode and a second capacitor electrode, the first capacitor electrode and the first gate are located in a same layer, the first capacitor electrode has a stacked structure, and the stacked structure of the first capacitor electrode is the same as the stacked structure of the first gate.

12 . The display substrate according to claim 11 , wherein the second capacitor electrode is electrically connected to the first active layer, the second capacitor electrode has a stacked structure, and the stacked structure of the second capacitor electrode is the same as the stacked structure of the first gate.

13 . The display substrate according to claim 10 , wherein the display substrate further comprises a second transistor disposed on the base substrate, and the second transistor comprises:
a third gate, disposed on a side of the base substrate; a second insulating layer, disposed on a side of the third gate away from the base substrate; and a second active layer, disposed on a side of the second insulating layer away from the base substrate, wherein the third gate and the first gate are located in a same layer, and the third gate has a same stacked structure as the first gate.

14 . The display substrate according to claim 13 , wherein the second transistor further comprises:
a fourth gate, disposed on a side of the second active layer away from the base substrate, wherein the fourth gate has a same stacked structure as the first gate.

15 . The display substrate according to claim 13 , wherein the first active layer comprises a polysilicon material, and the second active layer comprises a semiconductor oxide material.

16 . The display substrate according to claim 10 , further comprising a shielding layer, wherein the shielding layer is disposed between the first active layer of the first transistor and the base substrate.

17 . A display device comprising the display substrate according to claim 1 .

Assignees

• Boe Technology Group Co Ltd

Inventors

• Qu Caiyu
• Hao Yanjun
• Zhang Huijuan
• Fan Yibing
• Chen Dengyun
• Song Zunqing
• Li Dong
• Liu Zheng

Classifications

• H10D30/6755

  Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate · CPC title

• H10D30/6745

  Polycrystalline or microcrystalline silicon · CPC title

• H10D30/6734

  having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs · CPC title

• H10D30/6731

  Top-gate only TFTs · CPC title

• H10D30/6723

  having light shields · CPC title