Semiconductor device and method of manufacturing semiconductor device

Patent metadata

Field	Value
Publication number	US-12593483-B2
Application number	US-202218051775-A
Country	US
Kind code	B2
Filing date	Nov 1, 2022
Priority date	Feb 15, 2022
Publication date	Mar 31, 2026
Grant date	Mar 31, 2026

Abstract

To suppress an increase in RC-IGBT recovery loss. In a semiconductor device, an IGBT region includes a base layer of a second conductivity type in a surface layer of a drift layer, a diode region includes an anode layer of a second conductivity type in the surface layer of the drift layer, a termination region includes a well layer of the second conductivity type in the surface layer of the drift layer, an impurity concentration profile of the base layer and an impurity concentration profile of the anode layer in a direction along an upper surface of the drift layer cyclically fluctuate, and the impurity concentration profile of the base layer and the impurity concentration profile of the anode layer are different.

First claim

What is claimed is:

1 . A semiconductor device, which is a reverse conducting insulated gate bipolar transistor (RC-IGBT) in which an IGBT region and a diode region, which are an active region, and a termination region surrounding the active region in plan view are provided on a single semiconductor substrate, wherein
a drift layer of a first conductivity type is provided on an upper surface of the semiconductor substrate, the IGBT region includes a base layer of a second conductivity type in a surface layer of the drift layer, the diode region includes an anode layer of the second conductivity type in the surface layer of the drift layer, the termination region includes a well layer of the second conductivity type in the surface layer of the drift layer, an impurity concentration profile of impurities of the second conductivity type in the base layer and an impurity concentration profile of impurities of the second conductivity type in the anode layer in a direction along an upper surface of the drift layer cyclically fluctuate at a same depth, and the impurity concentration profile of the base layer and the impurity concentration profile of the anode layer are different.

2 . The semiconductor device according to claim 1 , wherein
fluctuation cycles of the impurity concentration profile of the base layer and the impurity concentration profile of the anode layer are different.

3 . The semiconductor device according to claim 1 , wherein
an impurity concentration per unit area in plan view of the base layer is higher than an impurity concentration per unit area in plan view of the anode layer.

4 . The semiconductor device according to claim 1 , wherein
a depth at which the base layer is formed is deeper than a depth at which the anode layer is formed.

5 . The semiconductor device according to claim 1 , wherein
the IGBT region further includes
a source layer of the first conductivity type in a surface layer of the base layer,
a gate insulating film formed in contact with the base layer interposed between the source layer and drift layer, and
a gate electrode formed in contact with the gate insulating film, and
in terms of the impurity concentration per unit area of the base layer, the impurity concentration per unit area is lower in positions away from the gate electrode than that in the positions close to the gate electrode.

6 . The semiconductor device according to claim 1 , further comprising
a boundary region located between the IGBT region and the diode region, wherein the boundary region is equipped with a boundary base layer of the second conductivity type in the surface layer of the drift layer, and an impurity concentration of the boundary base layer is higher than the impurity concentration of the base layer and the impurity concentration of the anode layer.

7 . The semiconductor device according to claim 6 , wherein
the impurity concentration profile of the boundary base layer in the direction along the upper surface of the drift layer cyclically fluctuates, and fluctuation cycles of the impurity concentration profile of the boundary base layer and the impurity concentration profile of the base layer or the impurity concentration profile of the anode layer are different.

8 . The semiconductor device according to claim 1 , wherein a depth from the upper surface of the substrate at which the base layer is formed is deeper than a maximum depth from the upper surface of the substrate at which the anode layer is formed.

9 . The semiconductor device according to claim 1 , wherein a first distance between adjacent peaks of impurity concentration in a fluctuation cycle of the impurity concentration profile of the base layer is different from a second distance between adjacent peaks of impurity concentration in a fluctuation cycle of the impurity concentration profile of the anode layer.

10 . The semiconductor device according to claim 1 , wherein a cycle of change of impurity concentration in the anode layer is shorter along the first direction than a cycle of change of impurity concentration in the base layer.

Assignees

• Mitsubishi Electric Corp

Inventors

• Honda Shigeto
• Fukada Yusuke
• Okamoto Hayato

Classifications

• H10D84/811

  Combinations of field-effect devices and one or more diodes, capacitors or resistors · CPC title

• H10D62/106

  having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions · CPC title

• H10D12/481

  having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs · CPC title

• H10D12/038

  having a recessed gate, e.g. trench-gate IGBTs · CPC title

• H10D8/01

  Manufacture or treatment · CPC title