Active pixel circuit, image sensor, and electronic device

Patent metadata

Field	Value
Publication number	US-12593148-B2
Application number	US-202118555789-A
Country	US
Kind code	B2
Filing date	May 31, 2021
Priority date	Apr 29, 2021
Publication date	Mar 31, 2026
Grant date	Mar 31, 2026

Abstract

An active pixel circuit, an image sensor and an electronic device are disclosed. The active pixel circuit has a photodiode and at least three MOS transistors. At least one of the MOS transistors serves as a transfer transistor, and at least another one of the MOS transistors serves as a reset transistor. Moreover, at least yet another one of the MOS transistors serves as other transistor(s). The transfer transistor has a higher threshold voltage and smaller off-state leakage current under operating voltage than each other MOS transistor. With this design, the high-threshold, low-leakage characteristics of the transfer transistor reduce storage distortion of the photodiode and signal readout distortion, resulting in less read noise and lower power consumption of the active pixel circuit. Meanwhile, the low-threshold, high-leakage (i.e., high-on-current) characteristics of the other MOS transistors impart an increased reading speed of the active pixel circuit.

First claim

What is claimed is:

1 . An active pixel circuit comprising a photodiode and at least three MOS transistors, at least one of the MOS transistors serving as a transfer transistor, at least another one of the MOS transistors serving as a reset transistor, at least yet another one of the MOS transistors serving as other transistor(s), the transfer transistor connected to the photodiode and configured to transmit a photoelectric signal from the photodiode, the reset transistor connected to a terminal of a respective one of the transfer transistor(s) for outputting the photoelectric signal and configured to reset the active pixel circuit, wherein each transfer transistor has a higher threshold voltage than each other MOS transistor, and each transfer transistor has a smaller off-state leakage current under operating voltage than each other MOS transistor,
wherein a threshold voltage of each reset transistor is higher than a threshold voltage of each other MOS transistor and an off-state leakage current under operating voltage of each reset transistor is smaller than an off-state leakage current under operating voltage of each other MOS transistor, or a threshold voltage of each reset transistor is lower than a threshold voltage of each other MOS transistor and an off-state leakage current under operating voltage of each reset transistor is greater than an off-state leakage current under operating voltage of each other MOS transistor.

2 . The active pixel circuit of claim 1 , wherein at least one of the other MOS transistors serves as a source follower transistor, which is connected to the terminal of the respective transfer transistor for outputting the signal and configured to buffer the signal from the transfer transistor, and/or at least one of the other MOS transistors serves as a row select transistor, which is connected to the source follower transistor and configured to enable the signal from the source follower transistor to be read out.

3 . The active pixel circuit of claim 2 , wherein the transfer transistor, the reset transistor, the source follower transistor and the row select transistor are all NMOS transistors.

4 . The active pixel circuit of claim 3 , wherein an anode of the photodiode is grounded, a cathode of the photodiode connected to a source of the transfer transistor, a drain of the transfer transistor connected to a source of the reset transistor, a gate of the source follower transistor and a floating diffusion region, a gate of the transfer transistor connected to a control voltage signal, a drain of the reset transistor and a drain of the source follower transistor both connected to an operating voltage signal, a source of the source follower transistor connected to a drain of the row select transistor, a gate of the row select transistor connected to a row select voltage signal and a source of the row select transistor providing a signal output terminal of the active pixel circuit.

5 . The active pixel circuit of claim 2 , wherein at least one of the other MOS transistors serves as an exposure control transistor, which is connected to the respective transfer transistor and configured to provide global exposure capabilities.

6 . The active pixel circuit of claim 5 , wherein the transfer transistor, the reset transistor, the source follower transistor, the row select transistor and the exposure control transistor are all NMOS transistors.

7 . The active pixel circuit of claim 6 , wherein an anode of the photodiode is grounded, a cathode of the photodiode connected to a source of the transfer transistor, a drain of the transfer transistor connected to a source of the reset transistor, a gate of the source follower transistor and a floating diffusion region, a gate of the transfer transistor connected to a control voltage signal, drains respectively of the reset transistor, the source follower transistor and the exposure control transistor all connected to an operating voltage signal, a source of the source follower transistor connected to a drain of the row select transistor, a gate of the row select transistor connected to a row select voltage signal, a source of the row select transistor providing a signal output terminal of the active pixel circuit and a gate of the exposure control transistor connected to an exposure control signal.

8 . The active pixel circuit of claim 2 , wherein the transfer transistor, the reset transistor, the source follower transistor and the row select transistor all have an operating voltage of between 1.62 V and 3.7 V.

9 . The active pixel circuit of claim 1 , further comprising a floating diffusion region, the floating diffusion region is connected to the terminal of the transfer transistor for outputting the signal and is configured to inductively generate a corresponding voltage signal from an amount of charge output from the transfer transistor.

10 . The active pixel circuit of claim 1 , wherein the transfer transistor has the threshold voltage of between 0.4 V and 1.0 V, and/or each other MOS transistor has the threshold voltage of between 0.2 V and 0.8 V,
wherein the transfer transistor has the off-state leakage current under operating voltage of between 0.1 pA/μm and 0.1 nA/μm, and/or each other transistor has the off-state leakage current under operating voltage of between 1 pA/μm and 100 nA/μm.

11 . An image sensor, comprising a pixel array and a control circuit, the pixel array comprising at least one active pixel circuit as defined in claim 1 , the control circuit connected to gates of corresponding MOS transistors in each active pixel circuit and configured to turn on or deactivate the corresponding MOS transistors in each active pixel circuit.

12 . An active pixel circuit comprising a photodiode and at least three MOS transistors, the at least three MOS transistors comprising at least one first MOS transistor, at least one second MOS transistor, and at least one third MOS transistor,
wherein the at least one first MOS transistor serves as a transfer transistor, the transfer transistor connected to both the photodiode and a corresponding third MOS transistor and configured to transmit a photoelectric signal from the photodiode, wherein the at least one third MOS transistors serving as a reset transistor, the reset transistor connected to a terminal of a respective one of the transfer transistor(s) for outputting the photoelectric signal and configured to reset the active pixel circuit, wherein each transfer transistor has a higher threshold voltage than each third MOS transistor, and each transfer transistor has a smaller off-state leakage current under operating voltage than each third MOS transistor, the active pixel circuit employs a correlated double sampling technique, wherein a threshold voltage of each reset transistor is higher than a threshold voltage of each third MOS transistor and an off-state leakage current under operating voltage of each reset transistor is smaller than an off-state leakage current under operating voltage of each third MOS transistor, or a threshold voltage of each reset transistor is lower than a threshold voltage of each transfer transistor and an off-state leakage current under operating voltage of each reset transistor is greater than an off-state leakage current under operating voltage of each transfer transistor.

13 . The active pixel circuit of claim 12 , wherein at least one of the third MOS transistors serves as a source follower transistor, which is connected to the terminal of the respective transfer transistor for outputting the signal and configured to buffer the signal from the transfer transistor, and/or at least one of the third MOS trans

Assignees

• Wuhan Xinxin Semiconductor Mfg

Inventors

• Zhou Jun
• Sun Peng
• Yang Daohong

Classifications

• H10F39/8037 Primary

  the integrated elements comprising a transistor · CPC title

• H10F39/18

  Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors · CPC title

• H04N25/77 Primary

  Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components · CPC title

• H04N25/70

  SSIS architectures; Circuits associated therewith · CPC title

• H10F39/803 Primary

  Pixels having integrated switching, control, storage or amplification elements · CPC title