Balancing wear across multiple reclaim groups

US12585389B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12585389-B2
Application numberUS-202418747582-A
CountryUS
Kind codeB2
Filing dateJun 19, 2024
Priority dateJul 6, 2023
Publication dateMar 24, 2026
Grant dateMar 24, 2026

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  5. First independent claim

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Abstract

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Aspects of the present disclosure configure a memory sub-system controller to balance program-erase count (PEC) across multiple reclaim groups of a memory sub-system. The controller groups a set of memory components into a plurality of reclaim groups (RGs), each RG of the plurality of RGs comprising a subset of reclaim units (RUs). The controller receives a request to program a set of data into a first RG of the plurality of RGs and compares a first PEC of the first RG with a second PEC of a second RG of the plurality of RGs. The controller performs wear leveling operations for the set of data requested to be programmed into the first RG using one or more memory components associated with the second RG based on a result of comparing the first PEC of the first RG with the second PEC of the second RG.

First claim

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What is claimed is: 1 . A system comprising: a set of memory components of a memory sub-system; and at least one processing device operatively coupled to the set of memory components, the at least one processing device being configured to perform operations comprising: grouping the set of memory components into a plurality of reclaim groups (RGs), each RG of the plurality of RGs comprising a subset of reclaim units (RUs); receiving, from a host system, a request to program a set of data into a first RG of the plurality of RGs, the request specifying the first RG of the plurality of RGs in which to program the set of data; comparing a first program-erase count (PEC) of the first RG with a second PEC of a second RG of the plurality of RGs; performing wear leveling operations for the set of data requested to be programmed into the first RG using one or more memory components associated with the second RG based on a result of comparing the first PEC of the first RG with the second PEC of the second RG; based on performing the wear leveling operation, programming the set of data into one or more of the subset of RUs of the second RG instead of the subset of RUs of the first RG specified in the request from the host system; wherein the operations comprise: enlarging a size of an individual RU of the subset of RUs of the first RG by donating a portion of a second RU of the subset of RUs of the second RG to the individual RU. 2 . The system of claim 1 , wherein the memory sub-system includes Flexible Data Placement (FDP). 3 . The system of claim 1 , the operations comprising: maintaining a table that stores a current PEC of each of the plurality of RGs, the first PEC being stored in the table in association with the first RG and the second PEC being stored in the table in association with the second RG. 4 . The system of claim 1 , the wear leveling operations comprising: programming the set of data requested to be programmed into the first RG into the one or more memory components associated with the second RG. 5 . The system of claim 4 , the operations comprising: regrouping at least a portion of the set of memory components based on the result of comparing the first PEC of the first RG with the second PEC of the second RG. 6 . The system of claim 5 , the operations comprising: determining that a first group of the set of memory components is associated with the first RG; determining that a second group of the set of memory components is associated with the second RG; and modifying association between the first group of the set of memory components and the first RG to associate the second group of the set of memory components with the first RG. 7 . The system of claim 6 , the operations comprising: modifying association between the second group of the set of memory components and the second RG to associate the first group of the set of memory components with the second RG; and maintaining association between a third group of the set of memory components with a third RG of the plurality of RGs. 8 . The system of claim 6 , the operations comprising: programming the set of data requested to be programmed into the first RG into the second group of the set of memory components instead of the first group of the set of memory components. 9 . The system of claim 5 , the operations comprising: determining that a difference between the first PEC of the first RG and the second PEC of the second RG transgresses a threshold; and initiating the regrouping of the at least the portion of the set of memory components in response to determining that the difference between the first PEC of the first RG and the second PEC of the second RG transgresses the threshold. 10 . The system of claim 1 , the operations comprising: determining that a first group of the set of memory components associated with the first RG has higher wearing than a second group of the set of memory components associated with the second RG based on the result of comparing the first PEC of the first RG with the second PEC of the second RG; defining the first RG as a high-wearing RG and the second RG as a low-wearing RG in response to determining that the first group of the set of memory components associated with the first RG has higher wearing than the second group of the set of memory components associated with the second RG; and enlarging a size of an individual RU of the subset of RUs of the first RG by donating a portion of a second RU of the subset of RUs of the second RG to the individual RU. 11 . The system of claim 10 , wherein the individual RU comprises a first set of planes of a first die, wherein the second RU comprises a second set of planes of a second die, the operations comprising: associating a block of an individual plane of the second set of planes with the individual RU to increase a quantity of blocks associated with the individual RU, wherein the second RU comprises blocks of a subset of the second set of planes that is fewer in quantity as a result of associating the block of the individual plane of the second set of planes with the individual RU. 12 . The system of claim 11 , the operations comprising: after associating the block of an individual plane of the second set of planes with the individual RU to increase the quantity of blocks associated with the individual RU, determining that wear of the first RG matches wear of the second RG; and in response to determining that the wear of the first RG matches the wear of the second RG, reducing the size of the individual RU by re-associating the block of the individual plane with the second RU. 13 . The system of claim 10 , the operations comprising: maintaining a tracking table that identifies the donated portion of the second RU; and removing the donated portion from the tracking table in response to determining that wear of the first RG matches wear of the second RG. 14 . The system of claim 10 , the operations comprising: while the donated portion of the second RU continues to be donated to the first RG, performing garbage collection operations on the second RG excluding the donated portion; and performing garbage collection operations on the first RG including the donated portion of the second RU. 15 . The system of claim 14 , the garbage collection operations comprising: folding valid data from one or more RUs of the first RG to one or more other RUs of the first RG. 16 . The system of claim 10 , wherein the operations comprise: selecting a size of the donated portion of the second RG; and computing, based on the selected size, a target PEC representing a quantity of PECs needed to complete balancing PEC values of the first RG with the PEC values of the second RG. 17 . The system of claim 10 , wherein the operations comprise: maintaining a queue of available blocks from the low-wearing RG available for use in expanding RUs of the high-wearing RG. 18 . A method comprising: grouping a set of memory components into a plurality of reclaim groups (RGs), each RG of the plurality of RGs comprising a subset of reclaim units (RUs); receiving, from a host system, a request to program a set of data into a first RG of the plurality of RGs, the request specifying the first RG of the plurality of RGs in which to program the set of data; comparing a first program-erase count (PEC) of the first RG with a second PEC of a second RG of the plurality of RGs; performing wear leveling operations for the set of data requested to be programmed into the first RG us

Assignees

Inventors

Classifications

  • G06F3/061Primary

    Improving I/O performance · CPC title

  • Command handling arrangements, e.g. command buffers, queues, command scheduling · CPC title

  • Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP] · CPC title

  • Multiple device management, e.g. distributing data over multiple flash devices · CPC title

  • Life time enhancement · CPC title

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What does patent US12585389B2 cover?
Aspects of the present disclosure configure a memory sub-system controller to balance program-erase count (PEC) across multiple reclaim groups of a memory sub-system. The controller groups a set of memory components into a plurality of reclaim groups (RGs), each RG of the plurality of RGs comprising a subset of reclaim units (RUs). The controller receives a request to program a set of data into…
Who is the assignee on this patent?
Micron Technology Inc
What technology area does this patent fall under?
Primary CPC classification G06F3/061. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Mar 24 2026 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).