Semiconductor device and power converter

Patent metadata

Field	Value
Publication number	US-12581946-B2
Application number	US-202217976370-A
Country	US
Kind code	B2
Filing date	Oct 28, 2022
Priority date	May 1, 2020
Publication date	Mar 17, 2026
Grant date	Mar 17, 2026

Abstract

A semiconductor device includes a semiconductor element, a first wiring member, a second wiring member, and a terminal. The semiconductor element includes a first main electrode and a second main electrode on a side opposite from the first main electrode. The first wiring member is connected to the first main electrode. The terminal has a first terminal surface connected to the second main electrode and a second terminal surface. The second terminal has four sides. Two of the four sides are parallel to a first direction intersecting the thickness direction, and other two sides of the four sides are parallel to a second direction perpendicular to the thickness direction and the first direction. The second wiring member is connected to the second terminal surface of the terminal through solder, and has a groove. The groove overlaps one or two of the four sides of the second terminal surface.

First claim

What is claimed is:

1 . A semiconductor device comprising:
a semiconductor element including
a first main electrode at a first surface of the semiconductor element, and
a second main electrode at a second surface of the semiconductor element on a side opposite from the first surface in a thickness direction of the semiconductor element;
a first wiring member connected to the first main electrode; a terminal having a first terminal surface connected to the second main electrode and a second terminal surface on a side opposite from the first terminal surface in the thickness direction, the second terminal surface having four sides, two of the four sides being parallel to a first direction perpendicular to the thickness direction, other two of the four sides being parallel to a second direction perpendicular to the thickness direction and the first direction; and a second wiring member connected to the second terminal surface through solder, the second wiring member having a single connection region and a single groove at a facing surface facing the terminal, the single connection region connected to the terminal, the single groove accommodating a surplus portion of the solder, wherein the single groove surrounds only the single connection region, and wherein, in a plan view of the single groove in the thickness direction, the single groove overlaps one or two of the four sides of the second terminal surface.

2 . The semiconductor device according to claim 1 ,
wherein the semiconductor element includes a pad disposed at the second surface and aligned with the second main electrode in the second direction, wherein the other two of the four sides are respectively a first side and a second side, and wherein the single groove is disposed closer to the terminal in the second direction, and the single groove overlaps the first side and does not overlap the second side on a side opposite from the first side.

3 . The semiconductor device according to claim 2 ,
wherein the single connection groove includes a non-overlapping region as a portion between the second side of the terminal and the single groove, and the non-overlapping region does not overlap the terminal in the plan view, and wherein the solder is disposed at the non-overlapping region.

4 . The semiconductor device according to claim 1 ,
wherein the semiconductor element includes a pad disposed at the second surface and aligned with the second main electrode in the second direction, wherein the two of the four sides at both ends of the second terminal surface in the first direction are respectively a third side and a fourth side, and wherein the single groove overlaps the third side and the fourth side.

5 . The semiconductor device according to claim 4 ,
wherein the single groove is disposed to be closer to the terminal in the second direction, wherein the other two of the four sides are respectively
a first side at the second terminal surface on a side closer to the pad, and
a second side on a side opposite from the first side, and
wherein the single groove is closer to the first side than the second side in the second direction.

6 . The semiconductor device according to claim 1 ,
wherein the second wiring member further includes:
a base material;
a metal film disposed at a surface of the base material, and made of a metal as a main component; and
a roughened oxide film being an oxide of a metal identical to the main component of the metal film, the roughened oxide film having a continuous surface with protrusions and recessions, and
wherein the roughened oxide film surrounds the facing surface.

7 . A power converter comprising:
a first semiconductor device included in a first power conversion device; and a second semiconductor device included in a second power conversion device, wherein each of the first semiconductor device and the second semiconductor device includes:
a semiconductor element including
a first main electrode at a first surface of each of the semiconductor elements, and
a second main electrode at a second surface of the semiconductor element on a side opposite from the first surface in a thickness direction of the semiconductor element;

a first wiring member connected to the first main electrode;
a terminal having a first terminal surface connected to the second main electrode and a second terminal surface on a side opposite from the first terminal surface in the thickness direction, the second terminal surface having four sides, two of the four sides being parallel to a first direction intersecting the thickness direction, other two of the four sides being parallel to a second direction perpendicular to the thickness direction and the first direction; and
a second wiring member connected to the second terminal surface through solder, the second wiring member having a single connection region and a single groove at a facing surface facing the terminal, the single connection region connected to the terminal, the single groove accommodating a surplus portion of the solder,
wherein a size of the terminal included in the first semiconductor device is different from a size of the terminal included in the second semiconductor device in a plan view of the first semiconductor device and the second semiconductor device in the thickness direction, and a size of the single groove included in the first semiconductor device is identical to a size of the single groove included in the second semiconductor device, wherein, in each of the first semiconductor device and the second semiconductor device, the single groove surrounds only the single connection region, and wherein, in a plan view of the single groove in the thickness direction, the single groove in each of the first semiconductor device and the second semiconductor device overlaps one or two of the four sides of the second terminal surface.

Assignees

• Denso Corp

Inventors

• Fukuoka Daisuke
• Uehigashi Hideyuki
• Umezawa Masayoshi
• Ooshima Masanori
• UWATAKI Ryoji
• Hirano Takahiro

Classifications

• H10W72/30

  Die-attach connectors · CPC title

• H10W72/50

  Bond wires · CPC title

• H10W72/851

  Dispositions of multiple connectors or interconnections · CPC title

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W90/736

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title