Phase inverter using transformer and transistor switch

Patent metadata

Field	Value
Publication number	US-12580495-B2
Application number	US-202318386241-A
Country	US
Kind code	B2
Filing date	Nov 1, 2023
Priority date	Mar 20, 2023
Publication date	Mar 17, 2026
Grant date	Mar 17, 2026

Abstract

A phase inverter includes a first transistor connected to a single signal port, a second transistor connected to the single signal port, a third transistor connected to a first power supply and forming a first contact point with the first transistor, a fourth transistor connected to the first power supply and forming a second contact point with the second transistor, and a transformer having a primary side connected to the first and the second contact point, and a secondary side connected to a first and a second differential signal port, wherein the phase inverter operates in one of a first phase mode in which only the first and the fourth transistor are turned on according to levels of voltages applied to gates of transistors, and a second phase mode in which only the second and the third transistor are turned on.

First claim

What is claimed is:

1 . A phase inverter comprising:
a first transistor having a first terminal connected to a single-ended signal port and a gate to which one of a high-level voltage and a low-level voltage is applied; a second transistor having a first terminal connected to the single-ended signal port and a gate configured to receive a voltage at a level opposite to that applied to the gate of the first transistor; a third transistor having a first terminal connected to a first power supply, a second terminal forming a first contact point with a second terminal of the first transistor, and a gate to which the voltage at the level opposite to the level of the voltage applied to the first transistor is applied; a fourth transistor having a first terminal connected to the first power supply, a second terminal forming a second contact point with a second terminal of the second transistor, and a gate to which a voltage at a level equal to the level of the voltage applied to the first transistor is applied; and a transformer having a primary winding with a first terminal directly connected to the first contact point and a second terminal directly connected to the second contact point, and a secondary winding with a first terminal and a second terminal respectively connected to a first differential signal port and a second differential signal port, wherein the phase inverter operates in one of a first phase mode in which only the first transistor and the fourth transistor are turned on, and a second phase mode in which only the second transistor and the third transistor are turned on, according to the levels of the voltages applied to the gates of the first, second, third, and fourth transistors, wherein the first terminals of the first, second, third, and fourth transistors are source terminals, the second terminals are drain terminals, and the first power supply is a ground power supply, wherein each of the first, second, third, and fourth transistors has a structure in which a body of the transistor is connected to the ground power supply.

2 . The phase inverter of claim 1 , wherein,
when a single input signal is input through the single-ended signal port, differential signals of opposite phases are output through the first and second differential signal ports; and in the first phase mode, the differential signals output through the first and second differential signal ports have a phase inverted by 180° from the differential signals output in the second phase mode.

3 . The phase inverter of claim 2 , wherein,
in the first phase mode in which only the first and fourth transistors are turned on, a first signal output through the first differential signal port has the same phase as the input signal, and a second signal output through the second differential signal port has an opposite phase to the input signal, and in the second phase mode in which only the second and third transistors are turned on, the first signal output through the first differential signal port has an opposite phase to the input signal, and the second signal output through the second differential signal port has the same phase as the input signal.

4 . The phase inverter of claim 1 , wherein,
when differential signals of opposite phases are input through the first and second differential signal ports, a single output signal is output through the single-ended signal port; and in the first phase mode, the single output signal output from the single-ended signal port has a phase inverted by 180° from the single output signal output in the second phase mode.

5 . The phase inverter of claim 4 , wherein,
in the first phase mode in which only the first and fourth transistors are turned on, the single output signal output through the single-ended signal port has the same phase as the first signal input to the first differential signal port and has an opposite phase to the second signal input to the second differential signal port; and in the second phase mode in which only the second and third transistors are turned on, the single output signal output through the single-ended signal port has an opposite phase to the first signal input to the first differential signal port and has the same phase as the second signal input to the second differential signal port.

6 . The phase inverter of claim 1 , further comprising:
a controller configured to control a level of a voltage applied to each of the gates of the first, second, third, and fourth transistors to drive the phase inverter in either the first phase mode or the second phase mode.

7 . The phase inverter of claim 1 , further comprising:
at least one fifth transistor connected in series to the third transistor between the second terminal of the third transistor and the first contact point; and at least one sixth transistor connected in series to the fourth transistor between the second terminal of the fourth transistor and the second contact point.

Assignees

• Found Of Soongsil University—Industry Cooperation
• Foundation Soongsil Univ Industry Cooperation

Inventors

• Lee Jaeyong
• Park Changkun

Classifications

• H02M1/08

  Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters · CPC title

• H03B27/00

  Generation of oscillations providing a plurality of outputs of the same frequency but differing in phase, other than merely two anti-phase outputs · CPC title

• H02M7/537 Primary

  using semiconductor devices only, e.g. single switched pulse inverters · CPC title

• H03F3/26 Primary

  Push-pull amplifiers; Phase-splitters therefor (duplicated single-ended push-pull arrangements or phase-splitters therefor H03F3/30) · CPC title